SE97BTP,547 NXP Semiconductors, SE97BTP,547 Datasheet - Page 20

• Manufacturer Part Number: SE97BTP,547
• Description: IC TEMP SENSOR DIMM 8HWSON
• Manufacturer: NXP Semiconductors

Specifications of SE97BTP,547

• Package / Case: 8-WSON (Exposed Pad), 8-HWSON
• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Temperature Threshold: + 150 C
• Full Temp Accuracy: 2 C
• Digital Output - Bus Interface: I2C
• Digital Output - Number Of Bits: 11 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Description/function: Temperature Sensor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5055-2

NXP Semiconductors
SE97B_1
Product data sheet
7.10.3.1 Current address read
7.10.3.2 Selective read
7.10.3 Read operations
In Standby mode, the SE97B internal address counter points to the data byte immediately
following the last byte accessed by a previous operation. If the ‘previous’ byte was the last
byte in memory, then the address counter will point to the first memory byte, and so on. If
the SE97B decodes a slave address with a ‘1’ in the R/W bit position
issue an Acknowledge in the ninth clock cycle and will then transmit the data byte being
pointed at by the address counter. The master can then stop further transmission by
issuing a No Acknowledge on the ninth bit then followed by a STOP condition.
The read operation can also be started at an address different from the one stored in the
address counter. The address counter can be ‘initialized’ by performing a ‘dummy’ write
operation
R/W bit set to ‘0’) and the desired byte address. Instead of following-up with data, the
master then issues a second START, followed by the ‘Current Address Read’ sequence,
as described in
Fig 15. Current address read timing
Fig 16. Selective read timing
(Figure
SDA
SDA
Section
START condition
START condition
START condition
S
S
S
16). The START condition is followed by the slave address (with the
1
1
1
slave address (memory)
slave address (memory)
slave address (memory)
Rev. 01 — 27 January 2010
0
0
0
7.10.3.1.
1
1
1
0
0
0
DDR memory module temp sensor with integrated SPD
A2 A1 A0
A2 A1 A0
A2 A1 A0
R/W acknowledge
R/W acknowledge
R/W acknowledge
0
1
1
A
from slave
A
from slave
A
from slave
data from memory
data from memory
word address
no acknowledge
no acknowledge
acknowledge
from master
from master
STOP condition
STOP condition
from slave
(Figure
002aac901
002aab251
© NXP B.V. 2010. All rights reserved.
A
A
A
SE97B
P
P
15), it will
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