L6740L STMicroelectronics, L6740L Datasheet - Page 34

IC HYBRID CONTROLLERS 48TQFP

L6740L

Manufacturer Part Number
L6740L
Description
IC HYBRID CONTROLLERS 48TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6740L

Applications
Hybrid Controllers
Voltage - Supply
9 V ~ 15 V
Current - Supply
20mA
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Number Of Outputs
2
Output Current
170 A
Input Voltage
13.2 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Hybrid Controller
compatible with PVI and SVI CPUs
Dual Controller
2 to 4 scalable phases for CPU CORE, 1 phase for NB
Dual Over-current Protection
Average and per-phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Input
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Output voltage monitoring and protections
Note:
7.4.2
34/44
Typical design considers the intervention of the Average OC before the per-phase OC, leav-
ing this last one as an extreme-protection in case of hardware failures in the external com-
ponents. Typical design flow is the following:
What previously listed is the typical design flow. In any case, custom design may require
different settings and ratios between the per-phase OC threshold and the AVG OC
threshold. Applications with huge ripple across inductors may required to set I
values higher than 35
50
NB section
Since the NB section reads the current across low-side MOSFET, it limits the bottom of the
NB inductor current entering in constant current until UV. In particular, since the device limits
the valley of the inductor current, the ripple entity, when not negligible, impacts on the real
OC threshold value and must be considered.
The device detects an over-current condition when the current information I
the fixed threshold of I
side MOSFET on, also skipping clock cycles, until the threshold is crossed back and I
results being lower than the I
MOSFET is turned off and the high-side is turned on with a duty cycle driven by the PWM
comparator.
The section enters the quasi-constant-current operation: the low-side MOSFET stays ON
until the current read becomes lower than I
MOSFET can be then turned ON with a T
MOSFET turn-off and the section works in the usual way until another OC event is detected.
This means that the average current delivered can slightly increase in quasi-constant-cur-
μ
A.
Define the maximum total output current (I
requirements
Set I
1.24 V and I
Design R
than the I
where N is the number of phases and DCR the DC resistance of the inductors. R
should be designed in worst-case conditions.
Design R
desired maximum current I
where V
desired.
Adjust the defined values according to bench-test of the application.
An additional capacitor in parallel to R
the protection intervention.
R
R
G
OC_AVG
=
OC_TH
(
----------------------------------------------------------------- -
1.1 I
OC_AVGTH
G
OC_AVG
OC_AVGmax
=
resistor in order to have I
to 35 μA. This implies R
----------------------------------------------- -
I
OC_AVGmax
OC_TH
OC_AVGmax
μ
V
OCTH_NB
N I ⋅
A: in this case the threshold may be increased still keeping I
OC_AVGTH
OCTH
in order to have the OC_AVG/LI pin voltage to V
is typically 2.5 V and I
is the current programmed through R
OCTH_NB
current. It results:
) DCR
(35μA typ). When this happens, the device keeps the low-
DCR
R
G
OC_AVGmax
threshold. After exiting the OC condition, the low-side
ON
OCP_NB
imposed by the control loop after the Low-Side
OC_TH
INFOx
. It results:
OC_AVG
OC_AVGmax
skipping clock cycles. The high-side
= I
= 33 kΩ (OC_PHASE pin is fixed to
OC_AVGmax
OC_TH
can be considered to add a delay in
when I
is the AVG_OC threshold
) according to system
OC_TH
OUT
is about 10% higher
).
OC_AVGTH
ISEN
OC_TH
overcomes
OC_TH
L6740L
to
at the
ISEN
G
<

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