L6740L STMicroelectronics, L6740L Datasheet - Page 28
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L6740L
Manufacturer Part Number
L6740L
Description
IC HYBRID CONTROLLERS 48TQFP
Manufacturer
STMicroelectronics
Datasheet
1.L6740LTR.pdf
(44 pages)
Specifications of L6740L
Applications
Hybrid Controllers
Voltage - Supply
9 V ~ 15 V
Current - Supply
20mA
Operating Temperature
0°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Number Of Outputs
2
Output Current
170 A
Input Voltage
13.2 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Hybrid Controller
compatible with PVI and SVI CPUs
Dual Controller
2 to 4 scalable phases for CPU CORE, 1 phase for NB
Dual Over-current Protection
Average and per-phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Input
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
L6740L
Manufacturer:
ST
Quantity:
20 000
Part Number:
L6740LTR
Manufacturer:
ST
Quantity:
20 000
Output voltage positioning
Caution:
Note:
6.8
6.9
28/44
Offset implementation is optional, in case it is not desired, simply short the pin to SGND.
In the above formulas, R
between NB_FB pin and the regulated voltage.
NB section - maximum duty-cycle limitation
To provide proper time for current-reading across the low-side MOSFET, the device imple-
ments a duty-cycle limitation for the NB section. This limitation is not fixed but it is linearly
variable with the current delivered to the load as follow:
duty cycle limitation is variable with the delivered current to provide fast load transient
response at light load as well as assuring robust over-current protection.
On-the-fly VID transitions
L6740L manages on-the-fly VID transitions that allow the output voltage of both sections to
modify during normal device operation for CPU power management purposes. OV, UV and
PWRGOOD signals are masked during every OTF-VID Transition and they are re-activated
with a 16 clock cycle delay to prevent from false triggering.
When changing dynamically the regulated voltage (OTF-VID), the system needs to charge
or discharge the output capacitor accordingly. This means that an extra-current I
needs to be delivered (especially when increasing the output regulated voltage) and it must
be considered when setting the over-current threshold of both the sections. This current
results:
where dV
in PVI).
Overcoming the OC threshold during the dynamic VID causes the device latch and disable.
Dynamic VID transition is managed in different ways according to the device operative
mode:
●
T
I
OTF-VID
ON_NB(max)
R
OS_NB
PVI mode.
L6740L checks for VID code modifications (See
internal additional OTFVID-clock and waits for a confirmation on the following falling
edge. Once the new code is stable, on the next rising edge, the reference starts
stepping up or down in LSB increments every two OTFVID-clock cycle until the new
VID code is reached. During the transition, VID code changes are ignored; the device
=
OUT
=
C
------------------- - R
V
1.240V
OUT
=
OS_NB
/ dT
⎧
⎨
⎩
0.80 T
0.40 T
⋅
dV
----------------- -
dT
VID
⋅
OUT
⋅
⋅
VID
depends on the operative mode (3 mV/μsec. in SVI or externally driven
FB_NB
SW
SW
FB_NB
I
I
NB_ISEN
NB_ISEN
has to be considered being the total resistance connected
=
=
0μA
35μA
Figure
11) on the rising-edge of an
OTF-VID
L6740L