LTC2923CDE#PBF Linear Technology, LTC2923CDE#PBF Datasheet - Page 14

IC POWER SUPPLY CONTROLLER 12DFN

LTC2923CDE#PBF

Manufacturer Part Number
LTC2923CDE#PBF
Description
IC POWER SUPPLY CONTROLLER 12DFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2923CDE#PBF

Applications
Power Supply Controller
Voltage - Supply
2.9 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
12-DFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Voltage - Input
-
Lead Free Status / Rohs Status
Compliant

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Manufacturer
Quantity
Price
Company:
Part Number:
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LT
Quantity:
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Part Number:
LTC2923CDE#PBF
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APPLICATIO S I FOR ATIO
Offset Tracking Example
LTC2923
Converting the circuit in the coincident tracking example
to the offset tracking shown in Figure 14 is relatively
simple. Here the 1.8V slave 1 supply ramps up 1V below
the master. The ramp rate remains the same (1000V/s), so
there are no changes necessary to steps 1 and 2 of the
3-step design procedure. Only step 3 must be considered.
Be sure to verify that the chosen voltage offsets will allow
the slave supplies to ramp up completely. In this example,
if the voltage offset were 2V, the slave supply would only
ramp up to 3.3V – 2V = 1.3V.
3. Choose R
14
First, convert the desired voltage offset, V
t
From Equation 4:
From Equation 5:
D
, using the ramp rate:
R
R
t
D
TA
TA
=
′′ =
= 13.1kΩ||13.2kΩ ≈ 6.65kΩ
V
S
TA
OS
S
0 8
1
to obtain the desired delay.
ms
1V/DIV
.
=
V
1000
U
1000
16 5
1
V
V s
.
/
U
V s
k
/
=
=
1
ms
13 2
.
W
1ms/DIV
k
Figure 14. Offset Tracking (from Figure 15)
OS
, to a delay,
U
2923 F14a
(6)
MASTER
SLAVE2
SLAVE1
3.3V
16.5k
6.65k
R
R
TB1
TA1
R
138k
R
100k
R
887k
R
316k
ONB
ONA
TB2
TA2
0.1µF
Figure 15. Offset Tracking Example
ON
RAMPBUF
TRACK1
TRACK2
V
CC
1ms/DIV
10Ω
LTC2923
GATE
GND
Q1
C
10nF
GATE
RAMP
FB1
FB2
3.3V
MASTER
2923 F14b
R
35.7k
R
412k
2923 F15
FA1
FA2
FB = 1.235V OUT
FB = 0.8V
1V/DIV
16.5k
DC/DC
R
DC/DC
R
887k
3.3V
3.3V
FB1
FB2
IN
IN
OUT
1.8V
SLAVE1
2.5V
SLAVE2
2923fa

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