LTC2923CDE#PBF Linear Technology, LTC2923CDE#PBF Datasheet - Page 12

• Manufacturer Part Number: LTC2923CDE#PBF
• Description: IC POWER SUPPLY CONTROLLER 12DFN
• Manufacturer: Linear Technology

Specifications of LTC2923CDE#PBF

• Applications: Power Supply Controller
• Voltage - Supply: 2.9 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 12-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Voltage - Input: -
• Lead Free Status / Rohs Status: Compliant

APPLICATIO S I FOR ATIO
Coincident Tracking Example
A typical three supply application is shown in Figure 11. The
master signal is a 3.3V module. The slave 1 supply is a 1.8V
switching power supply and the slave 2 supply is a 2.5V
switching power supply. Both slave supplies track coinci-
dently with the 3.3V supply that is controlled with an ex-
ternal FET. The ramp rate of the supplies is 1000V/s. The
3-step design procedure detailed previously can be used
to determine component values. Only the slave 1 supply is
considered here as the procedure is the same for the slave 2
supply.
1. Set the ramp rate of the master signal.
2. Solve for the pair of resistors that provide the desired
3. Choose R
LTC2923
12
From Equation 1:
slave supply behavior, assuming no delay.
From Equation 2:
From Equation 3:
Since no delay is desired, R
R
R
C
GATE
TB
TA
′ =
=
16 5
=
TA
16 5
1 235
1000
.
1V/DIV
.
to obtain the desired delay.
10
.
k
Ω
k
U
µ
Ω
V
V s
A
•
/
1000
1000
+
=
1 235
35 7
U
0 8
.
10
.
.
V s
V s
nF
k
/
/
V
Ω
V
TA
=
–
= R
16 5
W
16 5
1ms/DIV
.
0 8
TA
.
.
Figure 10. Coincident Tracking (from Figure 11)
k
′
Ω
k
V
Ω
≈
U
13
k
Ω
2923 F10a
MASTER
SLAVE2
SLAVE1
3.3V
In this example, all supplies remain low while the ON pin
is held below 1.23V. When the ON pin rises above 1.23V,
10µA pulls up C
the gate of the FET rises, the source follows and pulls up
the output to 3.3V at 1000V/s. This output serves as the
master signal and is buffered from the RAMP pin to the
RAMPBUF pin. As this output and the RAMPBUF pin rise,
the current from the TRACK pins is reduced. Conse-
quently, the voltage at the slave supply’s outputs in-
creases, and the slave supplies track the master supply.
When the ON pin is again pulled below 1.23V, 10µA will
pull down C
loads on the outputs are sufficient, all outputs will track
down coincidently at 1000V/s.
16.5k
R
R
13k
TB1
TA1
R
138k
R
100k
R
887k
R
412k
ONB
ONA
TB2
TA2
Figure 11. Coincident Tracking Example
0.1µF
GATE
RAMPBUF
TRACK1
TRACK2
V
ON
CC
GATE
and the gate of the FET at 1000V/s. If the
1ms/DIV
10Ω
LTC2923
and the gate of the FET at 1000V/s. As
GATE
GND
Q1
C
10nF
GATE
RAMP
FB1
FB2
3.3V
MASTER
2923 F10b
R
35.7k
R
412k
2923 F11
FA1
FA2
FB = 1.235V OUT
FB = 0.8V
R
1V/DIV
FB1
DC/DC
DC/DC
R
887k
3.3V
3.3V
IN
IN
FB2
16.5k
OUT
1.8V
SLAVE1
2.5V
SLAVE2
2923fa