LP3950SL/NOPB National Semiconductor, LP3950SL/NOPB Datasheet - Page 6

IC LED DRVR WHITE BCKLGT 32-TSCP

LP3950SL/NOPB

Manufacturer Part Number
LP3950SL/NOPB
Description
IC LED DRVR WHITE BCKLGT 32-TSCP
Manufacturer
National Semiconductor
Series
PowerWise®r
Type
Backlight, White LED (I²C Interface)r
Datasheet

Specifications of LP3950SL/NOPB

Topology
PWM, Step-Up (Boost)
Number Of Outputs
6
Internal Driver
Yes
Type - Primary
Flash/Torch, LED Blinker, Light Management Unit (LMU)
Type - Secondary
RGB, White LED
Frequency
2MHz
Voltage - Supply
2.7 V ~ 2.9 V
Voltage - Output
5V
Mounting Type
Surface Mount
Package / Case
32-Laminate TCSP
Operating Temperature
-40°C ~ 85°C
Internal Switch(s)
Yes
Efficiency
90%
Led Driver Application
Mobile Phone Display Lighting, General LED Lighting
No. Of Outputs
6
Output Current
300mA
Output Voltage
5.3V
Input Voltage
3V To 7.2V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
Other names
LP3950SL/CSP1
LP3950SLTR
www.national.com
Block Diagram
Modes of Operation
RESET:
STANDBY:
STARTUP:
BOOST STARTUP: Soft start for boost output is generated in the BOOST STARTUP mode. In this mode the boost output is
NORMAL:
In the RESET mode all the internal registers are reset to the default values. RESET is entered always if
input NRST is LOW or internal Power On Reset is active.
The STANDBY mode is entered if the register bit NSTBY is LOW and RESET is not active. This is the low
power consumption mode, when all the circuit functions are disabled. Registers can be written in this mode
and the control bits are effective immediately after start up.
INTERNAL STARTUP SEQUENCE powers up all the needed internal blocks (V
ensure the correct oscillator initialization, a 10 ms delay is generated by the internal state-machine. Thermal
shutdown (THSD) disables the chip operation and Startup mode is entered until no thermal shutdown event
is present.
raised in PFM mode during the 10 ms delay generated by the state-machine. All RGB outputs are off during
the 10 ms delay to ensure smooth startup. The Boost startup is entered from Internal Startup Sequence if
EN_BOOST is HIGH or from Normal mode when EN_BOOST is written HIGH.
During the NORMAL mode the user controls the chip using the control registers. Registers can be written
in any sequence and any number of bits can be altered in a register within one write cycle . If the default
mode is selected, default control register values are used.
FIGURE 1. LP3950 Block Diagram
6
REF
, oscillator, etc.). To
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