DS1874T+ Maxim Integrated Products, DS1874T+ Datasheet - Page 52

IC CTLR SFP+ ANLG LDD 28-TQFN

DS1874T+

Manufacturer Part Number
DS1874T+
Description
IC CTLR SFP+ ANLG LDD 28-TQFN
Manufacturer
Maxim Integrated Products
Type
Laser Diode Controllerr
Datasheet

Specifications of DS1874T+

Number Of Channels
1
Voltage - Supply
2.85 V ~ 3.9 V
Current - Supply
2.5mA
Operating Temperature
-40°C ~ 95°C
Package / Case
28-WFQFN Exposed Pad
Mounting Type
Surface Mount
Number Of Outputs
5
Duty Cycle (max)
50 %
Output Voltage
0 V to 3.9 V
Mounting Style
SMD/SMT
Switching Frequency
0 KHz to 400 KHz
Operating Supply Voltage
2.85 V to 3.9 V
Supply Current
2.5 mA to 10 mA
Maximum Operating Temperature
+ 95 C
Fall Time
300 ns
Minimum Operating Temperature
- 40 C
Rise Time
300 ns
Synchronous Pin
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
90-1874T+000
SFP+ Controller with Digital LDD Interface
Table 01h, Register FBh: ALARM EN
52
______________________________________________________________________________________
FBh
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
MEMORY TYPE
Layout is identical to ALARM
whether this memory exists in Table 01h or 05h.
BITS 5:4
BITS 2:0
LOS HI
BIT 7
BIT 7
BIT 6
BIT 3
LOS HI: Enables alarm to create TXFINT (Lower Memory, Register 71h) logic.
0 = Disables interrupt from LOS HI alarm.
1 = Enables interrupt from LOS HI alarm.
LOS LO: Enables alarm to create TXFINT (Lower Memory, Register 71h) logic.
0 = Disables interrupt from LOS LO alarm.
1 = Enables interrupt from LOS LO alarm.
RESERVED
BIAS MAX: Enables alarm to create internal signal FETG (see Figure 12) logic.
0 = Disables interrupt from BIAS MAX alarm.
1 = Enables interrupt from BIAS MAX alarm.
RESERVED
LOS LO
00h
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
PW2 or (PW1 and RWTBL1C)
Nonvolatile (SEE)
0
RESERVED
0
in Lower Memory, Register 73h. The MASK bit (Table 02h, Register 89h) determines
RESERVED
BIAS MAX
RESERVED
RESERVED
RESERVED
BIT 0

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