MM74C48N Fairchild Semiconductor, MM74C48N Datasheet
MM74C48N
Specifications of MM74C48N
74C48N
Available stocks
Related parts for MM74C48N
MM74C48N Summary of contents
Page 1
... The remaining NAND gate and three input buffers provide test-blanking input/ripple-blanking output, and rip- ple-blanking inputs. Ordering Code: Order Number Package Number MM74C48N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Connection Diagrams Top View © 2002 Fairchild Semiconductor Corporation ...
Page 2
Truth Table Decimal Inputs or Function LT RBI ...
Page 3
Absolute Maximum Ratings Voltage at Any Pin 0. Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating V Range CC Absolute Maximum V CC Lead Temperature (Soldering, 10 seconds) DC Electrical Characteristics Symbol Parameter CMOS ...
Page 4
AC Electrical Characteristics pF, unless otherwise specified A L Symbol Parameter t t Propagation Delay to a “1” or “0” on pd0, pd1 Segment Outputs from Data Inputs t Propagation Delay to a “0” on ...
Page 5
Light Emitting Diode (LED) Readout Incandescent Readout **A filament pre-warm resistor is recommended to reduce filament thermal shock and increase the effective cold resistance of the filament. Gas Discharge Readout Fluorescent Readout Liquid Crystal (LC) Readout Direct DC drive of ...
Page 6
Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at ...