FS6X1220RD Fairchild Semiconductor, FS6X1220RD Datasheet - Page 9

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FS6X1220RD

Manufacturer Part Number
FS6X1220RD
Description
IC SWIT PWM CM OVP UVLO HV D2PAK
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FS6X1220RD

Output Isolation
Isolated
Frequency Range
270 ~ 330kHz
Voltage - Input
9 ~ 35 V
Voltage - Output
200V
Power (watts)
45W
Operating Temperature
-25°C ~ 150°C
Package / Case
TO-263-6, D²Pak (5 leads + Tab-Variant)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FS6X1220RDTR
FS6X1220RD_NL
FS6X1220RD_NLTR
FS6X1220RD_NLTR
3.2 Over Load Protection (OLP) : Overload means that the
load current exceeds a pre-set level due to an abnormal
situation. In this situation, protection circuit should be
activated in order to protect the SMPS. However, even when
the SMPS is in the normal operation, the over load protection
circuit can be activated during the load transition. In order to
avoid this undesired operation, the over load protection
circuit is designed to be activated after a specified period to
determine whether it is a transient situation or an overload
situation. Because of the pulse-by-pulse current limit
capability, the maximum peak current through the SMPS is
limited, and therefore the maximum input power is restricted
with a given input voltage. If the output consumes beyond
this maximum power, the output voltage (Vo) decreases
below the set voltage. This reduces the current through the
opto-coupler diode, which also reduces opto-coupler
transistor current increasing Vfb. If Vfb exceeds 2.6V, D1 is
blocked and the 5µA current source starts to charge Cfb
slowly compared to when the 0.9mA current source charges
Cfb. In this condition, Vfb continues increasing until it
reaches 7.5V, and the switching operation is terminated at
that time as shown in figure 4. The delay time for shutdown
is the time required to charge Cfb from 2.6V to 7.5V with
5µA. When Cfb is 10nF (103), T
and when Cfb is 0.1µF (104), T
These values are enough to prevent SMPS from being shut
down during transient situations.
3.3 Over voltage Protection (OVP) : In case of malfunction
in the secondary side feedback circuit, or feedback loop open
caused by a defect of solder, the current through the opto-
coupler transistor becomes almost zero. Then, Vfb climbs up
in a similar manner to the over load situation, forcing the
preset maximum current to be supplied to the secondary side
until the over load protection is activated. Because energy
more than required is provided to the output, the output
voltage may exceed the rated voltage before the over load
protection is activated, resulting in the breakdown of the
devices in the secondary side. In order to prevent this
situation, an over voltage protection (OVP) circuit is
employed. In general, Vcc is proportional to the output
7.5V
2.6V
V
FB
Figure 4. Over load protection
T
1
T
Over load protection
12
= Cfb*(7.5-2.6)/I
12
12
is approximately 98ms.
is approximately 9.8ms
delay
T
2
t
voltage and FS6X1220R uses Vcc instead of directly
monitoring the output voltage. If V
circuit is activated resulting in termination of switching. In
order to avoid undesired activation of OVP during normal
operation, Vcc should be properly designed to be below 25V.
3.4 Thermal Shutdown (TSD) : The thermal shutdown
circuitry senses the junction temperature. The threshold is set
at 160°C. When the junction temperature rises above this
threshold (160°C) the power MOSFET is disabled.
4. The Line UVLO and Sleep Mode
According to the voltage of Line Sense pin, three operation
modes are defined; Normal operation mode, Line under
voltage lock out mode and Sleep mode as shown in figure 5.
When the voltage of this pin is over 2.55V, FS6X1220R
operates in normal mode. When the voltage of this pin is
smaller than 2.55V, it goes into line under voltage lock out
mode terminating switching operation. When the voltage of
this pin is smaller than 1.8V, it enters into sleep mode.
During sleep mode, reference voltage generation circuit
including shunt regulator is disabled and only 300µA
operation current is required.
ON OFF
Sleep
Vin
Figure 5. Line Sense block
R2
R1
Sense
Line
5
(2.5V)
(1.8v)
V
V
SL
LU
CC
Vcc good
Line UVLO
exceeds 25V, OVP
Enable
FS6X1220R
Internal
Bias
Vref
3
9V/15V
Vcc
9

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