PSD4235G2V-12UI STMicroelectronics, PSD4235G2V-12UI Datasheet - Page 63

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PSD4235G2V-12UI

Manufacturer Part Number
PSD4235G2V-12UI
Description
IC FLASH 4MBIT 120NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD4235G2V-12UI

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
120ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Number Of Macrocells
24
Maximum Operating Frequency
25.6 MHz
Delay Time
90 ns
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1970

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PSD4235G2V-12UI
Manufacturer:
STMicroelectronics
Quantity:
10 000
PSD4235G2
18.2
Table 33.
Product Term Allocator
The CPLD has a Product Term Allocator. PSDsoft Express, uses the Product Term Allocator
to borrow and place product terms from one macrocell to another. The following list
summarizes how product terms are allocated:
Each macrocell may only borrow product terms from certain other macrocells. Product
terms already in use by one macrocell are not available for another macrocell.
If an equation requires more product terms than are available to it, then “external” product
terms are required, which consume other output macrocells (OMC). If external product
terms are used, extra delay is added for the equation that required the extra product terms.
This is called product term expansion. PSDsoft Express performs this expansion as needed.
Macrocell
McellA0
McellA1
McellA2
McellA3
McellA4
McellA5
McellA6
McellA7
McellB0
McellB1
McellB2
McellB3
McellB4
McellB5
McellB6
McellB7
Output
McellA0-McellA7 all have three native product terms and may borrow up to six more
McellB0-McellB3 all have four native product terms and may borrow up to five more
McellB4-McellB7 all have four native product terms and may borrow up to six more.
Output macrocell Port and Data bit Assignments
Assignment
Port A0
Port A1
Port A2
Port A3
Port A4
Port A5
Port A6
Port A7
Port B0
Port B1
Port B2
Port B3
Port B4
Port B5
Port B6
Port B7
Port
Product
Native
Terms
3
3
3
3
3
3
3
3
4
4
4
4
4
4
4
4
Maximum
Borrowed
Product
Terms
6
6
6
6
6
6
6
6
5
5
5
5
6
6
6
6
Data bit for
Loading or
Reading
D10
D11
D12
D13
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
Complex PLD (CPLD)
Motorola 16-Bit
Loading or
Reading
MCU for
D10
D11
D12
D13
D14
D15
D8
D9
D0
D1
D2
D3
D4
D5
D6
D7
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