MT47H64M8B6-25E L:D TR Micron Technology Inc, MT47H64M8B6-25E L:D TR Datasheet - Page 65

• Manufacturer Part Number: MT47H64M8B6-25E L:D TR
• Description: IC DDR2 SDRAM 512MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H64M8B6-25E L:D TR

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (64M x 8)
• Speed: 2.5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Organization: 64Mx8
• Density: 512Mb
• Address Bus: 16b
• Access Time (max): 400ps
• Maximum Clock Rate: 800MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 205mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1427-2

Figure 29: Tangent Line for
Table 30: DDR2-400/533
All units are shown in picoseconds
PDF: 09005aef82f1e6e2
Rev. M 9/08 EN
(V/ns)
Slew
Rate
DQ
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
0.4
t
125
83
4.0 V/ns
DS
Δ
0
–
–
–
–
–
–
t
DH
45
21
Δ
0
–
–
–
–
–
–
t
125
–11
Notes:
83
3.0 V/ns
DS
Δ
0
–
–
–
–
–
t
–14
Hold slew rate
rising signal
DH
45
21
Δ
Vil(dc) MAX
t
0
–
–
–
–
–
Vih(dc) MIN
Vil(ac) MAX
Vih(ac) MIN
DS,
1. For all input signals, the total
Vref(dc)
t
VddQ
sheet value to the derating value listed in Table 30 (page 65).
t
125
–11
–25
IH
t
83
2.0 V/ns
DS
CK#
Δ
DH Derating Values with Differential Strobe
0
–
–
–
–
Vss
CK
=
t
–14
–31
DC to Vref
Tangent line (Vref[dc] - Vil[dc] MAX)
DH
45
21
Δ
0
–
–
–
–
region
DQS, DQS# Differential Slew Rate
t
–13
–31
DS
95
12
1.8 V/ns
Δ
1
–
–
–
–
ΔTR
t
–19
–42
t IS
DH
33
12
–2
Tangent
Δ
–
–
–
–
line
t
65
–19
–43
DS
24
13
–1
1.6 V/ns
Δ
–
–
–
–
t IH
t
DS and
ΔTR
t
–30
–59
DH
24
10
–7
Hold slew rate
falling signal
Δ
–
–
–
–
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Nominal
t
t
–31
–74
DH required is calculated by adding the data
DS
25
11
–7
1.4 V/ns
line
Δ
–
–
–
–
512Mb: x4, x8, x16 DDR2 SDRAM
=
t
–18
–47
–89
Tangent line (Vih[dc] MIN - Vref[dc])
t IS
DH
22
Δ
–
–
–
5
–
Tangent
DC to Vref
line
region
–127 –140 –115 –128 –103 –116
Input Slew Rate Derating
t
–19
–62
t IH
DS
23
1.2 V/ns
Δ
5
–
–
–
–
ΔTF
ΔTF
Nominal
t
–35
–77
DH
17
–6
Δ
–
–
–
–
line
© 2004 Micron Technology, Inc. All rights reserved.
t
–50
17
1.0 V/ns
DS
–7
Δ
–
–
–
–
–
t
–23
–65
DH
Δ
–
–
–
–
–
6
t
–38
DS
0.8 V/ns
Δ
5
–
–
–
–
–
–
t
–11
–53
DH
Δ
–
–
–
–
–
–