MT48H32M16LFCJ-75 L IT:A TR Micron Technology Inc, MT48H32M16LFCJ-75 L IT:A TR Datasheet - Page 38

• Manufacturer Part Number: MT48H32M16LFCJ-75 L IT:A TR
• Description: IC SDRAM 512MBIT 133MHZ 54VBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H32M16LFCJ-75 L IT:A TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1331-2

Concurrent Auto Precharge
READ with Auto Precharge
Figure 31:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. J 2/08 EN
READ With Auto Precharge Interrupted by a READ
Notes:
Internal
States
1. Interrupted by a READ (with or without auto precharge): A READ to bank m will inter-
2. Interrupted by a WRITE (with or without auto precharge): A WRITE to bank m will
An access command (READ or WRITE) to a second bank while an access command with
auto precharge enabled on a first bank is executing is not allowed by SDRAMs, unless
the SDRAM supports concurrent auto precharge. Micron SDRAMs support concurrent
auto precharge. Four cases where concurrent auto precharge occurs are defined below.
1. DQM is LOW.
COMMAND
rupt a READ on bank n, CL later. The precharge to bank n will begin when the READ
to bank m is registered (Figure 31).
interrupt a READ on bank n when registered. DQM should be used two clocks prior to
the WRITE command to prevent bus contention. The precharge to bank n will begin
when the WRITE to bank m is registered (Figure 32 on page 39).
ADDRESS
BANK m
BANK n
CLK
DQ
Page Active
T0
NOP
READ - AP
BANK n,
Page Active
BANK n
COL a
T1
READ with Burst of 4
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
CL = 3 (bank n)
T2
38
NOP
READ - AP
BANK m,
T3
BANK m
COL d
Interrupt Burst, Precharge
Micron Technology, Inc., reserves the right to change products or specifications without notice.
READ with Burst of 4
T4
CL = 3 (bank m)
NOP
D
OUT
a
t
RP - BANK n
T5
NOP
D
a + 1
OUT
T6
NOP
©2005 Micron Technology, Inc. All rights reserved.
D
OUT
d
DON’T CARE
Idle
T7
NOP
t RP - BANK m
Precharge
D
d + 1
OUT
Operations