MT48H32M16LFCJ-75 L IT:A TR Micron Technology Inc, MT48H32M16LFCJ-75 L IT:A TR Datasheet - Page 29

• Manufacturer Part Number: MT48H32M16LFCJ-75 L IT:A TR
• Description: IC SDRAM 512MBIT 133MHZ 54VBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H32M16LFCJ-75 L IT:A TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1331-2

Figure 17:
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. J 2/08 EN
Terminating a READ Burst
Notes:
Fixed-length READ bursts may be truncated with a BURST TERMINATE command,
provided that auto precharge was not activated. The BURST TERMINATE command
should be issued x cycles before the clock edge at which the last desired data element is
valid, where x = CL - 1. This is shown in Figure 17 on page 29 for each possible CL; data
element n + 3 is the last desired data element of a longer burst.
COMMAND
1. DQM is LOW.
COMMAND
ADDRESS
ADDRESS
CLK
CLK
DQ
DQ
BANK,
COL n
T0
T0
BANK,
COL n
READ
READ
CL = 2
T1
T1
NOP
NOP
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
CL = 3
29
T2
T2
NOP
NOP
D
OUT
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
T3
NOP
NOP
D
n + 1
D
OUT
OUT
n
TERMINATE
TERMINATE
T4
BURST
T4
BURST
X = 1 cycle
D
n + 2
D
n + 1
OUT
OUT
X = 2 cycles
T5
T5
NOP
NOP
D
n + 3
D
n + 2
OUT
OUT
©2005 Micron Technology, Inc. All rights reserved.
T6
T6
NOP
NOP
D
n + 3
OUT
DON’T CARE
Operations
T7
NOP