MT45W4MW16BCGB-701 WT TR Micron Technology Inc, MT45W4MW16BCGB-701 WT TR Datasheet - Page 51
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MT45W4MW16BCGB-701 WT TR
Manufacturer Part Number
MT45W4MW16BCGB-701 WT TR
Description
IC PSRAM 64MBIT 70NS 54VFBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT45W4MW16BCGB-701_IT.pdf
(69 pages)
Specifications of MT45W4MW16BCGB-701 WT TR
Format - Memory
RAM
Memory Type
PSRAM (Page)
Memory Size
64M (4M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-30°C ~ 85°C
Package / Case
54-VFBGA
Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 38:
PDF: 09005aef8247bd51/Source: 09005aef8247bd83
64mb_burst_cr1_5_p25z_133mhz__2.fm - Rev. F 9/07 EN
DQ[15:0]
LB#/UB#
A[21:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OH
OL
OL
IH
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
Burst READ at End-of-Row (Wrap Off)
Notes:
t CLK
1. Nondefault BCR settings for burst READ at end of row: fixed or variable latency; WAIT
2. For burst READs, CE# must go HIGH before the third CLK after the WAIT period begins
output
Valid
active LOW; WAIT asserted during delay.
(before the third CLK after WAIT asserts with BCR[8] = 0 or before the fourth CLK after
WAIT asserts with BCR[8] = 1). Micron devices are fully compatible with the CellularRAM
Workgroup specification that requires CE# to go HIGH 1 cycle sooner than shown here.
64Mb: 4 Meg x 16 Async/Page/Burst CellularRAM 1.5 Memory
t KHTL
output
Valid
End of row
t HZ
Note 2
51
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t HZ
High-Z
©2005 Micron Technology, Inc. All rights reserved.
Timing Diagrams
Don’t Care