IS43R16160B-5TL-TR ISSI, Integrated Silicon Solution Inc, IS43R16160B-5TL-TR Datasheet - Page 27

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IS43R16160B-5TL-TR

Manufacturer Part Number
IS43R16160B-5TL-TR
Description
IC DDR SDRAM 256MBIT 66TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
SDRAMr

Specifications of IS43R16160B-5TL-TR

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
256M (16Mx16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.5 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOPII
Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
700ps
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS43R83200B
IS43R16160B, IC43R16160B
Integrated Silicon Solution, Inc.
Rev. B
DDR SDRAM (Rev.1.1)
10/31/08
WRITE
the WRITE command with data strobe input, following (BL-1) data are written into RAM, when
the Burst Length is BL. The start address is specified by A0-9(x8)/A0-8(x16), and the address
sequence of burst data is defined by the Burst Type. A WRITE command may be applied to any
active bank, so the row precharge time (tRP) can be hidden behind continuous input data by
interleaving the multiple banks. From the last data to the PRE command, the write recovery time
(tWRP) is required. When A10 is high at a WRITE command, the auto-precharge(WRITEA) is
performed. Any command(READ,WRITE,PRE,ACT) to the same bank is inhibited till the internal
precharge is complete. The next ACT command can be issued after tDAL from the last input data
cycle.
After tRCD from the bank activation, a WRITE command can be issued. 1st input data is set from
Command
A0-9,11,12
BA0,1
/CLK
DQS
CLK
A10
DQ
Preliminary
Preliminary
ACT
Xa
Xa
Xa
00
D
tRCD
WRITE
Ya
00
Multi Bank Interleaving WRITE (BL=8)
0
Da0
ACT
Xb
Xb
10
Da1
Da2
Da3
D
tRCD
256M Double Data Rate Synchronous DRAM
Da4
Da5
WRITE
Da6
10
Yb
0
Da7
Db0
Db1
Zentel Electronics Corporation
Db2
PRE
00
0
Db3
A3S56D30/40ETP
Db4
Db5
Db6
Db7
PRE
10
0
27

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