LFE3-95EA-V-EVN Lattice, LFE3-95EA-V-EVN Datasheet - Page 25

• Manufacturer Part Number: LFE3-95EA-V-EVN
• Description: Programmable Logic IC Development Tools LatticeECP3-95EA Video Protocol Board
• Manufacturer: Lattice
• Type: FPGAr

Specifications of LFE3-95EA-V-EVN

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: LFE3-95E-7FN1156C
• Interface Type: DVI
• Operating Supply Voltage: 12 V
• Description/function: LatticeECP3 Video protocol board
• Factory Pack Quantity: 1

2. DDR2 Bandwidth
Ordering Information
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet:
Revision History
© 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as
listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of
their respective holders. The specifications and information herein are subject to change without notice.
LatticeECP3 Video Protocol Board
1. Some early revision C LatticeECP3 Video Protocol Boards have the LatticeECP3 “E” device installed (LFE3-95E-V-EVN). For these
boards, see TN1180,
devices.
This board does not include the recommended DDR2 termination resistors. Because of this, DDR2 may not
work correctly on this board at all frequencies. Performance on individual boards may vary, but testing shows
the best results at 125MHz, 150 MHz and 250MHz. 200MHz operation may be compromised due to this termi-
nation issue. It has also been found that U31 tends to have such issue more likely than U29. Based on the
above findings, the following is strongly recommended when using the on-board DDR2 memory:
If the operating frequency around 200 MHz cannot be avoided, the following may help work around or mitigate
the issue:
October 2012
March 2010
March 2011
May 2011
– If only one memory device is needed, U29 is recommended over U31.
– DDR2 memory operating frequency around 200 MHz on this board should be avoided if possible.
– Set the DDR2 memory interface related pins on FPGA DRIVE = 8 and SLEWRATE = SLOW in Design
– Change the on-die-termination (ODT) of the DDR2 memory device. This can be done by setting the
[phone] (Outside North America)
[e-mail]
www.latticesemi.com
Date
Planner.
desired value for the extended mode register. ODT = 50 appears to be better than the others on the
board tested, but this may vary from board to board. Users may wish to experiment with different ODT
options to determine the best ODT value.
Description
LatticeECP3 High-Speed I/O
Version
01.0
01.1
01.2
01.3
Interface, for information on the differences between the LatticeECP3 “E” and “EA”
Initial release.
Added Known Issues text section.
Updated Ordering Information table for LFE3-95EA-V-EVN part number.
Updated document with new corporate logo.
Updated LatticeECP3 pin numbers in the Push-button Switch Connec-
tions table.
FPGA Configuration schematic – Updated name of PR5A in the ECP3
Configuration I/Os section.
LFE3-95EA-V-EVN
LatticeECP3 Video Protocol Board – Revision C
Ordering Part Number
25
1
Change Summary
China RoHS Environment-Friendly
Use Period (EFUP)
User’s Guide