LFE3-95EA-V-EVN Lattice, LFE3-95EA-V-EVN Datasheet - Page 2

• Manufacturer Part Number: LFE3-95EA-V-EVN
• Description: Programmable Logic IC Development Tools LatticeECP3-95EA Video Protocol Board
• Manufacturer: Lattice
• Type: FPGAr

Specifications of LFE3-95EA-V-EVN

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: LFE3-95E-7FN1156C
• Interface Type: DVI
• Operating Supply Voltage: 12 V
• Description/function: LatticeECP3 Video protocol board
• Factory Pack Quantity: 1

LatticeECP3 Video Protocol Board – Revision C
User’s Guide
Introduction
The LatticeECP3™ FPGA family includes many features for video applications. For example, DisplayPort, SMPTE
standards (SD-SDI, HD-SDI and 3G-SDI), DVB-ASI, DVI and HDMI can be implemented with 16 channels of
embedded SERDES/PCS. 7:1 LVDS video interfaces like ChannelLink and CameraLink can be supported by the
generic DDRX2 mode on the I/O pins. When configuring to TRLVDS mode, the I/O pins on banks 0 and 1 can also
be used to receive the TMDS signals of DVI or HDMI video standard.
This user’s guide describes revision C of the LatticeECP3 Video Protocol Board featuring the LatticeECP3 LFE3-
95E-7FN1156C FPGA device. The stand-alone evaluation PCB provides a functional platform for development and
rapid prototyping of many different video applications.
Figure 1. LatticeECP3 Video Protocol Board – Revision C
Features
• Video interfaces for interconnection to video standard equipment
• Allow the demonstration of SD/HD/3G-SDI, DisplayPort and PCI Express (x4) interfaces using SERDES chan-
nels
• High speed Mezzanine connector connected to SERDES channels for future expansion
• Allows the demonstration of LVDS video standards – ChannelLink and CameraLink
• Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra)
• Allows the demonstration of receiving TMDS signals using the DVI interface
• On-board Boot Flash with Serial SPI Flash memory device
• Shows interoperation with high performance DDR2 memory components
• Driver-based “run-time” device configuration capability via an ORCAstra or RS232 interface
• SMAs for external high-speed clock / PLL inputs
• Switches, LEDs and LCD display header for demo purposes
• Mictor connector for using Logic Analyzer in the debugging phase
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