AT25DF641-MWH-Y Atmel, AT25DF641-MWH-Y Datasheet - Page 34

• Manufacturer Part Number: AT25DF641-MWH-Y
• Description: IC FLASH 64MBIT 100MHZ 8VDFN
• Manufacturer: Atmel

Specifications of AT25DF641-MWH-Y

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 64M (32K pages x 256 bytes)
• Speed: 100MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VDFN
• Architecture: Sectored
• Interface Type: SPI Serial
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 19 mA
• Mounting Style: SMD/SMT
• Organization: 64 KB x 128
• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 5ns
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VDFN
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 19mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.
10.1.
34
Status Register Commands
Read Status Register
The two-byte Status Register can be read to determine the device’s ready/busy status, as well as the status of
many other functions such as Hardware Locking and Software Protection. The Status Register can be read at any
time, including during an internally self-timed program or erase operation.
To read the Status Register, the
device. After the opcode has been clocked in, the device will begin outputting Status Register data on the SO pin
during every subsequent clock cycle. After the second byte of the Status Register has been clocked out, the
sequence will repeat itself starting again with the first byte of the Status Register as long as the
asserted and the clock pin is being pulsed. The data in the Status Register is constantly being updated, so each
repeating sequence will output new data. The RDY/BSY status is available for both bytes of the Status Register
and is updated for each byte.
At clock frequencies above f
Therefore, if operating at clock frequencies above f
device in order to read the correct values of both bytes of the Status Register.
Deasserting the
high-impedance state. The
read.
Table 10-1.
Notes: 1. Only bit 7 of Status Register Byte 1 will be modified when using the Write Status Register
Atmel AT25DF641
Bit
3:2
7
6
5
4
1
0
(1)
2. R/W = Readable and writeable
RDY/BSY
SPRL
WPP
SWP
WEL
RES
EPE
Byte 1 command
R = Readable only
Status Register Format – Byte 1
CS
Sector Protection Registers
Locked
Reserved for future use
Erase/Program Error
Write Protect (
Software Protection Status
Write Enable Latch Status
Ready/Busy Status
pin will terminate the Read Status Register operation and put the SO pin into a
Name
CS
CLK
pin can be deasserted at any time and does not require that a full byte of data be
WP
, the first two bytes of data output from the Status Register will not be valid.
CS
) Pin Status
pin must first be asserted and the opcode of 05h must be clocked into the
Type
R/W
R
R
R
R
R
R
CLK
(2)
, at least four bytes of data must be clocked out from the
00
01
10
11
0
1
0
0
1
0
1
0
1
0
1
Sector Protection Registers are unlocked (default)
Sector Protection Registers are locked
Reserved for future use
Erase or program operation was successful
Erase or program error detected
All sectors are software unprotected (all Sector
Protection Registers are 0)
Some sectors are software protected
Read individual Sector Protection Registers to
Reserved for future use
All sectors are software protected (all Sector Protection
Device is not write enabled (default)
Device is write enabled
Device is ready
Device is busy with an internal operation
WP
WP
Registers are 1 – default)
determine which sectors are protected
is asserted
is deasserted
Description
CS
3680F–DFLASH–4/10
pin remains