AT25DF641-MWH-Y Atmel, AT25DF641-MWH-Y Datasheet - Page 22

• Manufacturer Part Number: AT25DF641-MWH-Y
• Description: IC FLASH 64MBIT 100MHZ 8VDFN
• Manufacturer: Atmel

Specifications of AT25DF641-MWH-Y

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 64M (32K pages x 256 bytes)
• Speed: 100MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VDFN
• Architecture: Sectored
• Interface Type: SPI Serial
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 19 mA
• Mounting Style: SMD/SMT
• Organization: 64 KB x 128
• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 5ns
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VDFN
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Supply Current: 19mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.2.
8.3.
22
Write Disable
The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Register to the logical
"0" state. With the WEL bit reset, all Byte/Page Program, erase, Protect Sector, Unprotect Sector, Sector
Lockdown, Freeze Sector Lockdown State, Program OTP Security Register, and Write Status Register
commands will not be executed. Other conditions can also cause the WEL bit to be reset; for more details, refer to
the WEL bit section of the Status Register description.
To issue the Write Disable command, the
into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode
will be ignored. When the
The complete opcode must be clocked into the device before the
deasserted on an even byte boundary (multiples of eight bits); otherwise, the device will abort the operation and
the state of the WEL bit will not change.
Figure 8-2.
Protect Sector
Every physical 64-Kbyte sector of the device has a corresponding single-bit Sector Protection Register that is
used to control the software protection of a sector. Upon device power-up, each Sector Protection Register will
default to the logical “1” state indicating that all sectors are protected and cannot be programmed or erased.
Issuing the Protect Sector command to a particular sector address will set the corresponding Sector Protection
Register to the logical “1” state. The following table outlines the two states of the Sector Protection Registers.
Table 8-1.
Atmel AT25DF641
SCK
SO
CS
SI
Value
0
1
Write Disable
Sector Protection Register Values
Sector Protection Status
Sector is unprotected and can be programmed and erased
Sector is protected and cannot be programmed or erased
This is the default state
MS B
HIG H-IMP E DANC E
0
0
0
1
CS
0
2
OP C ODE
0
pin is deasserted, the WEL bit in the Status Register will be reset to a logical “0”.
3
0
4
1
5
0
6
0
7
CS
pin must first be asserted and the opcode of 04h must be clocked
CS
pin is deasserted, and the
CS
3680F–DFLASH–4/10
pin must be