iMX233-OLINUXINO-MICRO Olimex Ltd., iMX233-OLINUXINO-MICRO Datasheet - Page 19

• Manufacturer Part Number: iMX233-OLINUXINO-MICRO
• Description: Development Boards & Kits - ARM OLINUXINO i.MX233 MICRO LINUX SBC
• Manufacturer: Olimex Ltd.

Specifications of iMX233-OLINUXINO-MICRO

• Rohs: yes
• Product: Development Boards
• Tool Is For Evaluation Of: MCIMX233CAG4C
• Core: ARM926EJ-S
• Interface Type: Ethernet, USB
• Operating Supply Voltage: 5 V
• Description/function: Single Board Linux Computer i.MX233 ARM926J at 454 MHz with UB host, TV-out (PAL / NTSC), 2x30 GPIOs, SD
• Dimensions: 76.2 mm x 43.2 mm
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Tradename: OLinuXino

OLIMEX© 2012
 Security Features
 External Memory Interface (EMI)
 Wide Assortment of External Media Interfaces
 Dual Peripheral Bus Bridges with 18 DMA Channels
 Highly Flexible Display Controller
 Pixel Processing Pipeline (PXP)
 Integrated TV-Out Support
 Data Co-Processor (DCP)
 Three Universal Asynchronous Receiver-Transmitters (UARTs)
 I2C Master/Slave
— Absolute accuracy of 1.3%
— Read-only unique ID for digital rights management algorithms
— Secure boot using 128-bit AES hardware decryption
— SHA-1 hashing hardware
— Customer-programmed (OTP) 128 bit AES key is never visible to software.
— Provides memory-mapped (load/store) access to external memories
— Supports the following types DRAM:
— 1.8V Mobile DDR
— Standard 2.5V DDR1
— High-speed MMC, secure digital (SD)
— Hardware Reed-Solomon Error Correction Code (ECC) engine offers industry-leading
protection and performance for NANDs.
— Hardware BCH ECC engine allowing for up to 20-bit correction and programmable
redundant area.
— Multiple peripheral clock domains save power while optimizing performance.
— Direct Memory Access (DMA) with sophisticated linked DMA command architecture
saves power and off-loads the CPU.
— 8-bit data ITU-R BT.656 D1 digital video stream output mode (PAL/NTSC), with onthe-
fly RGB to YCbCr color-space-conversion.
— Flexible input formats
— Provides full path from color-space conversion, scaling, alpha-blending to rotation
without intermediate memory access
— Bi-linear scaling algorithm with cropping and letterboxing
— Alpha-blend, BITBLT, color-keying
— Memory efficient block-based rotation engine
— Integrated PAL/NTSC TV-encoder fully pipelined to display controller’s D1 resolution
output stream
— Integrated low-power 10-bit Video DAC (VDAC) for composite analog video output.
— AES 128-bit encryption/decryption
— SHA-1 hashing
— High-speed memory copy
— Two high-speed application UARTs operating up to 3.25 Mb/s with hardware flow
control and dual DMA.
— Debug UART operates at up to 115Kb/s using programmed I/O.
— DMA control of an entire EEPROM or other device read/write transaction without CPU
Page 19 of 47
OLinuXino-MICRO user's manual