ADP1048DC1-EVALZ Analog Devices, ADP1048DC1-EVALZ Datasheet - Page 69

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ADP1048DC1-EVALZ

Manufacturer Part Number
ADP1048DC1-EVALZ
Description
Daughter Cards & OEM Boards ADP1048 DAUGHTERCARD
Manufacturer
Analog Devices
Series
ADP1048r
Datasheet

Specifications of ADP1048DC1-EVALZ

Rohs
yes
Product
Daughter Cards
Description/function
100 kHz daughter board
Dimensions
40 mm x 25 mm
Interface Type
I2C
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Factory Pack Quantity
1
For Use With
ADP1048
Data Sheet
Bits
[4:2]
1
0
VAC_THRESHOLD_SET REGISTER
This register sets the input voltage threshold for input ac line period measurement and zero-crossing detection.
Table 98. Register 0xFE25—VAC_THRESHOLD_SET
Bits
7
[6:0]
VAC_THRESHOLD_READ REGISTER
Table 99. Register 0xFE26—VAC_THRESHOLD_READ
Bits
7
[6:0]
MIN_AC_PERIOD_SET REGISTER
Table 100. Register 0xFE27—MIN_AC_PERIOD_SET
Bits
[7:0]
MAX_AC_PERIOD_SET REGISTER
Table 101. Register 0xFE28—MAX_AC_PERIOD_SET
Bits
[7:0]
Bit Name
Delay time
Enable fast loop
during soft start
Enable fast loop
Bit Name
Enable automatic
threshold
Threshold voltage
Bit Name
RSVD
VAC average
reading
Bit Name
Minimum ac line
period
Bit Name
Maximum ac line
period
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R/W
R/W
R/W
Description
Delay time before switching from the fast loop filter back to the normal filter after the output
voltage is within the regulation band (Bits[6:5]).
Bit 4
0
0
0
0
1
1
1
1
Enables the fast loop filter during soft start.
1 = fast loop filter is used during soft start.
0 = normal filter is used during soft start.
Enables the fast loop filter with a delay. The threshold is programmed in Bits[6:5].
1 = enable fast loop filter.
0 = disable fast loop filter.
Description
1 = enable automatic threshold.
0 = disable automatic threshold.
These bits set the threshold voltage to detect the ac line frequency and period if Bit 7 is set to 0.
Description
Reserved.
Return the reading of the threshold voltage to detect the ac line frequency and period if the
automatic threshold is enabled in Register 0xFE25, Bit 7.
Description
These bits set the minimum ac line period of the input voltage. Each LSB corresponds to 163.84 μs
resolution.
Description
These bits set the maximum ac line period of the input voltage. Each LSB corresponds to 163.84 μs
resolution.
Bit 3
0
0
1
1
0
0
1
1
Rev. 0 | Page 69 of 84
Bit 2
0
1
0
1
0
1
0
1
Number of Half AC Line Cycles
0
1
2
3
4
5
6
7
ADP1047/ADP1048

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