AT25DF321A-SH-B Atmel, AT25DF321A-SH-B Datasheet - Page 33

• Manufacturer Part Number: AT25DF321A-SH-B
• Description: IC FLASH 32MBIT 100MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF321A-SH-B

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 32M (16384 pages x 256 Bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Memory Configuration: 16384 Pages X 256 Bytes
• Interface Type: Serial, SPI
• Clock Frequency: 100MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3686D–DFLASH–12/09
11.1.7 SLE Bit
11.1.8 PS Bit
11.1.9 ES Bit
11.1.10 RDY/BSY Bit
The SLE bit is used to enable and disable the Sector Lockdown and Freeze Sector Lockdown State commands. When the
SLE bit is in the logical “0” state (the default state after power-up), the Sector Lockdown and Freeze Sector Lockdown
commands are disabled. If the Sector Lockdown and Freeze Sector Lockdown commands are disabled, then any attempts
to issue the commands will be ignored. This provides a safeguard for these commands against accidental or erroneous
execution. When the SLE bit is in the logical “1” state, the Sector Lockdown and Freeze Sector Lockdown State
commands are enabled.
Unlike the WEL bit, the SLE bit does not automatically reset after certain device operations. Therefore, once set, the SLE bit
will remain in the logical “1” state until it is modified using the Write Status Register Byte 2 command or until the device
has been power cycled. The Reset command has no effect on the SLE bit.
If the Freeze Sector Lockdown State command has been issued, then the SLE bit will be permanently reset in the logical
“0” state to indicate that the Sector Lockdown command has been disabled.
The PS bit indicates whether or not a sector is in the Program Suspend state.
The ES bit indicates whether or not a sector is in the Erase Suspend state.
The RDY/BSY bit is used to determine whether or not an internal operation, such as a program or erase, is in progress. To
poll the RDY/BSY bit to detect the completion of a program or erase cycle, new Status Register data must be continually
clocked out of the device until the state of the RDY/BSY bit changes from a logical “1” to a logical “0”.
Figure 11-1. Read Status Register
SCK
SO
CS
SI
HIGH-IMPEDANCE
MSB
0
0
0
1
0
2
OPCODE
0
3
0
4
1
5
0
6
1
7
MSB
D
8
STATUS REGISTER
D
9
D
10 11
BYTE 1
D
D
12
D
13 14
D
D
15 16
MSB
D
STATUS REGISTER
D
17
D
18
BYTE 2
D
19
D
20
D
21 22
D
D
23 24
MSB
D
STATUS REGISTER
D
25
D
26
BYTE 1
D
27
Atmel AT25DF321A
D
28 29
D
D
30
D
33