AT25DF321A-SH-B Atmel, AT25DF321A-SH-B Datasheet - Page 23

• Manufacturer Part Number: AT25DF321A-SH-B
• Description: IC FLASH 32MBIT 100MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF321A-SH-B

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 32M (16384 pages x 256 Bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Memory Configuration: 16384 Pages X 256 Bytes
• Interface Type: Serial, SPI
• Clock Frequency: 100MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3686D–DFLASH–12/09
9.6
If the desire is to only change the SPRL bit without performing a Global Protect or Global Unprotect, then the system can
simply write a 0Fh to the first byte of the Status Register to change the SPRL bit from a logical “1” to a logical “0”
provided the WP pin is deasserted. Likewise, the system can write an F0h to change the SPRL bit from a logical “0” to a
logical “1” without affecting the current sector protection status (no changes will be made to the Sector Protection
Registers).
When writing to the first byte of the Status Register, bits five, four, three and two will not actually be modified but will be
decoded by the device for the purposes of the Global Protect and Global Unprotect functions. Only bit seven, the SPRL bit,
will actually be modified. Therefore, when reading the first byte of the Status Register, bits five, four, three and two will not
reflect the values written to them but will instead indicate the status of the WP pin and the sector protection status. Please
refer to
values can be read for bits five, four, three and two.
Read Sector Protection Registers
The Sector Protection Registers can be read to determine the current software protection status of each sector. Reading
the Sector Protection Registers, however, will not determine the status of the WP pin.
To read the Sector Protection Register for a particular sector, the CS pin must first be asserted and the opcode of 3Ch must
be clocked in. Once the opcode has been clocked in, three address bytes designating any address within the sector must
be clocked in. After the last address byte has been clocked in, the device will begin outputting data on the SO pin during
every subsequent clock cycle. The data being output will be a repeating byte of either FFh or 00h to denote the value of
the appropriate Sector Protection Register.
At clock frequencies above f
above f
appropriate Sector Protection Register.
Table 9-3.
Deasserting the CS pin will terminate the read operation and put the SO pin into a high-impedance state. The CS pin can
be deasserted at any time and does not require that a full byte of data be read.
In addition to reading the individual Sector Protection Registers, the Software Protection Status (SWP) bits in the Status
Register can be read to determine if all, some, or none of the sectors are software protected (refer to
Register” on page 30
Figure 9-5.
SCK
SO
CS
Output Data
SI
00h
CLK
FFh
“Read Status Register” on page 30
, at least two bytes of data must be clocked out from the device in order to determine the correct status of the
Read Sector Protection Register
Read Sector Protection Register-Output Data
HIGH-IMPEDANCE
MSB
0
0
Sector Protection Register Value
Sector Protection Register value is 0 (sector is unprotected).
Sector Protection Register value is 1 (sector is protected).
for more details).
0
1
1
2
OPCODE
1
3
CLK
1
4
, the first byte of data output will not be valid. Therefore, if operating at clock frequencies
1
5
0
6
0
7
MSB
A
8
and
A
9
ADDRESS BITS A23-A0
Table 11-1 on page 30
A
10 11
A
A
12
A
A
29 30
A
A
31 32
for details on the Status Register format and what
MSB
D
D
33
DATA BYTE
D
34
D
35
D
36
D
37 38
D
D
39 40
MSB
D
Atmel AT25DF321A
D
“Read Status
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