AT25DF321A-SH-B Atmel, AT25DF321A-SH-B Datasheet - Page 12

• Manufacturer Part Number: AT25DF321A-SH-B
• Description: IC FLASH 32MBIT 100MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF321A-SH-B

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 32M (16384 pages x 256 Bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Memory Configuration: 16384 Pages X 256 Bytes
• Interface Type: Serial, SPI
• Clock Frequency: 100MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12
If the starting memory address denoted by A23-A0 does not fall on an even 256-byte page boundary (A7-A0 are not all
0), then special circumstances regarding which memory locations to be programmed will apply. In this situation, any data
that is sent to the device that goes beyond the end of the page will wrap around back to the beginning of the same page.
For example, if the starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent to the device, then
the first two bytes of data will be programmed at addresses 0000FEh and 0000FFh while the last byte of data will be
programmed at address 000000h. The remaining bytes in the page (addresses 000001h through 0000FDh) will not be
programmed and will remain in the erased state (FFh). In addition, if more than 256-bytes of data are sent to the device,
then only the last 256-bytes sent will be latched into the internal buffer.
When the CS pin is deasserted, the device will take the data stored in the internal buffer and program it into the
appropriate memory array locations based on the starting address specified by A23-A0 and the number of data bytes sent
to the device. If less than 256-bytes of data were sent to the device, then the remaining bytes within the page will not be
programmed and will remain in the erased state (FFh). The programming of the data bytes is internally self-timed and
should take place in a time of t
The three address bytes and at least one complete byte of data must be clocked into the device before the CS pin is
deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device
will abort the operation and no data will be programmed into the memory array. In addition, if the address specified by
A23-A0 points to a memory location within a sector that is in the protected state (see
locked down (see
device will return to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register will be reset
back to the logical “0” state if the program cycle aborts due to an incomplete address being sent, an incomplete byte of
data being sent, the CS pin being deasserted on uneven byte boundaries, or because the memory location to be
programmed is protected or locked down.
While the device is programming, the Status Register can be read and will indicate that the device is busy. For faster
throughput, it is recommended that the Status Register be polled rather than waiting the t
data bytes have finished programming. At some point before the program cycle completes, the WEL bit in the Status
Register will be reset back to the logical “0” state.
The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to program
properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register.
Figure 8-3.
SCK
Atmel AT25DF321A
SOI
CS
SI
Dual-Input Byte Program
MSB
HIGH-IMPEDANCE
1
“Sector Lockdown” on page 25
0
0
1
1
2
OPCODE
0
3
0
4
PP
0
5
or t
1
6
BP
0
7
if only programming a single byte.
MSB
A
8
A
9
ADDRESS BITS A23-A0
A
10 11
), then the Byte/Page Program command will not be executed, and the
A
A
12
A
A
29 30
A
A
31 32
MSB
D 6
D 7
DATA BYTE
INPUT
D 4
D 5
33
D 2
D 3
34
D 0
D 1
35
“Protect Sector” on page 19
BP
or t
PP
time to determine if the
3686D–DFLASH–12/09
) or