AT25DF321A-SH-B Atmel, AT25DF321A-SH-B Datasheet - Page 10

IC FLASH 32MBIT 100MHZ 8SOIC

AT25DF321A-SH-B

Manufacturer Part Number
AT25DF321A-SH-B
Description
IC FLASH 32MBIT 100MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT25DF321A-SH-B

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (16384 pages x 256 Bytes)
Speed
100MHz
Interface
SPI, RapidS
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Memory Configuration
16384 Pages X 256 Bytes
Interface Type
Serial, SPI
Clock Frequency
100MHz
Supply Voltage Range
2.7V To 3.6V
Memory Case Style
SOIC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 7-4.
8.
8.1
10
SCK
SIO
SO
CS
Program and Erase Commands
Byte/Page Program
The Byte/Page Program command allows anywhere from a single byte of data to 256-bytes of data to be programmed
into previously erased memory locations. An erased memory location is one that has all eight bits set to the logical “1”
state (a byte value of FFh). Before a Byte/Page Program command can be started, the Write Enable command must have
been previously issued to the device (see
Status Register to a logical “1” state.
To perform a Byte/Page Program command, an opcode of 02h must be clocked into the device followed by the three
address bytes denoting the first byte location of the memory array to begin programming at. After the address bytes have
been clocked in, data can then be clocked into the device and will be stored in an internal buffer.
If the starting memory address denoted by A23-A0 does not fall on an even 256-byte page boundary (A7-A0 are not all
0), then special circumstances regarding which memory locations to be programmed will apply. In this situation, any data
that is sent to the device that goes beyond the end of the page will wrap around back to the beginning of the same page.
For example, if the starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent to the device, then
the first two bytes of data will be programmed at addresses 0000FEh and 0000FFh while the last byte of data will be
programmed at address 000000h. The remaining bytes in the page (addresses 000001h through 0000FDh) will not be
programmed and will remain in the erased state (FFh). In addition, if more than 256-bytes of data are sent to the device,
then only the last 256-bytes sent will be latched into the internal buffer.
When the CS pin is deasserted, the device will take the data stored in the internal buffer and program it into the
appropriate memory array locations based on the starting address specified by A23-A0 and the number of data bytes sent
to the device. If less than 256-bytes of data were sent to the device, then the remaining bytes within the page will not be
programmed and will remain in the erased state (FFh). The programming of the data bytes is internally self-timed and
should take place in a time of t
The three address bytes and at least one complete byte of data must be clocked into the device before the CS pin is
deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device
will abort the operation and no data will be programmed into the memory array. In addition, if the address specified by
A23-A0 points to a memory location within a sector that is in the protected state (see
locked down (see
device will return to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register will be reset
back to the logical “0” state if the program cycle aborts due to an incomplete address being sent, an incomplete byte of
data being sent, the CS pin being deasserted on uneven byte boundaries, or because the memory location to be
programmed is protected or locked down.
Atmel AT25DF321A
Dual-Output Read Array
HIGH-IMPEDANCE
MSB
0
0
0
1
1
2
OPCODE
1
3
“Sector Lockdown” on page 25
1
4
0
5
1
6
1
7
MSB
A
PP
8
or t
A
9
A
ADDRESS BITS A23-A0
10 11
BP
A
if only programming a single byte.
A
12
“Write Enable” on page 18
A
), then the Byte/Page Program command will not be executed, and the
A
29 30
A
A
31 32
MSB
X
X
33
X
DON'T CARE
34
X
35
) to set the Write Enable Latch (WEL) bit of the
X
36
X
37 38
X
X
39
MSB
D 6
D 7
40
DATA BYTE 1
OUTPUT
D 4
D 5
41
D 2
D 3
“Protect Sector” on page 19
42 43
D 0
D 1
MSB
D 6
D 7
44
DATA BYTE 2
OUTPUT
D 4
D 5
45
D 2
D 3
46
D 0
D 1
47 48
MSB
D 6
D 7
3686D–DFLASH–12/09
D 4
D 5
) or

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