EVAL-AD5142ADBZ Analog Devices, EVAL-AD5142ADBZ Datasheet - Page 26

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EVAL-AD5142ADBZ

Manufacturer Part Number
EVAL-AD5142ADBZ
Description
Digital Potentiometer Development Tools EVALUATION BOARD I.C.
Manufacturer
Analog Devices
Series
AD5142Ar
Datasheet

Specifications of EVAL-AD5142ADBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD5142A
Resistance
10 kOhms/100 kOhms
Operating Supply Voltage
5.5 V
Interface Type
I2C
Maximum Operating Temperature
+ 125 C
Factory Pack Quantity
1
AD5122A/AD5142A
RDAC ARCHITECTURE
To achieve optimum performance, Analog Devices, Inc., has
patented the RDAC segmentation architecture for all the digital
potentiometers. In particular, the
a three-stage segmentation approach, as shown in Figure 37.
The
transmission gate CMOS topology and with the gate voltage
derived from V
Top Scale/Bottom Scale Architecture
In addition, the
reduce the resistance between terminals. These positions are
called bottom scale and top scale. At bottom scale, the typical
wiper resistance decreases from 130 Ω to 60 Ω (R
At top scale, the resistance between Terminal A and Terminal W
is decreased by 1 LSB, and the total resistance is reduced to
60 Ω (R
7-BIT/8-BIT
ADDRESS
DECODER
AD5122A/AD5142A
AB
Figure 37.
= 100 kΩ).
DD
AD5122A/AD5142A
and V
AD5122A/AD5142A
A
B
SS
.
wiper switch is designed with the
R
R
R
R
H
H
H
H
AD5122A/AD5142A
Simplified RDAC Circuit
include new positions to
R
R
R
R
M
M
M
M
S
S
R
R
TS
BS
L
L
AB
= 100 kΩ).
employ
W
Rev. A | Page 26 of 32
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation—±8% Resistor Tolerance
The
terminals are used as a variable resistor. The unused terminal can
be floating, or it can be tied to Terminal W, as shown in Figure 38.
The nominal resistance between Terminal A and Terminal B,
R
the wiper terminal. The 7-bit/8-bit data in the RDAC latch is
decoded to select one of the 128/256 possible wiper settings. The
general equations for determining the digitally programmed
output resistance between Terminal W and Terminal B are
AD5122A:
AD5142A:
where:
D is the decimal equivalent of the binary code in the 7-bit/8-bit
RDAC register.
R
R
In potentiometer mode, similar to the mechanical potentiometer,
the resistance between Terminal W and Terminal A also
produces a digitally controlled complementary resistance, R
R
starts at the maximum resistance value and decreases as the data
loaded into the latch increases. The general equations for this
operation are
AD5122A:
AD5142A:
where:
D is the decimal equivalent of the binary code in the 7-bit/8-bit
RDAC register.
R
R
AB
AB
W
WA
AB
W
, is 10 kΩ or 100 kΩ, and has 128/256 tap points accessed by
is the wiper resistance.
is the wiper resistance.
is the end-to-end resistance.
is the end-to-end resistance.
AD5122A/AD5142A
also gives a maximum of 8% absolute resistance error. R
R
R
R
R
WB
WB
AW
AW
A
B
(
(
(
(
D
D
D
D
)
)
)
)
W
Figure 38. Rheostat Mode Configuration
128
256
128
256
D
D
128
256
R
R
D
D
AB
AB
operate in rheostat mode when only two
A
B
R
R
AB
AB
R
R
W
W
W
R
R
W
W
From 0x00 to 0x7F
From 0x00 to 0xFF
From 0x00 to 0x7F
From 0x00 to 0xFF (4)
A
B
Data Sheet
W
WA
WA
(1)
(2)
(3)
.

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