ATMEGA16U2-16AU Atmel, ATMEGA16U2-16AU Datasheet - Page 192

no-image

ATMEGA16U2-16AU

Manufacturer Part Number
ATMEGA16U2-16AU
Description
8-bit Microcontrollers - MCU 16K Flash
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA16U2-16AU

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
AVR
Data Bus Width
8 bit
Program Memory Size
16 KB
Data Ram Size
1.25 KB
Data Rom Size
512 B
Program Memory Type
Flash
Factory Pack Quantity
1250
20.5.3
20.6
7799D–AVR–11/10
Memory management
Freeze clock
The firmware has the ability to freeze the clock of USB controller by setting the FRZCLK bit, and
thereby reduce the power consumption. When FRZCLK is set, it is still possible to access to the
following registers:
When FRZCLK is set, only the asynchronous interrupt may be triggered:
The controller does only support the following memory allocation management.
The reservation of an Endpoint can only be made in the increasing order (Endpoint 0 to the last
Endpoint). The firmware shall thus configure them in the same order.
The reservation of an Endpoint k
cates the memory and insert it between the Endpoints k
“slides” up and its data is lost. Note that the k
Clearing an Endpoint enable (EPEN) does not clear either its ALLOC bit, or its configuration
(EPSIZE/PSIZE, EPBK/PBK). To free its memory, the firmware should clear ALLOC. Then, the
k
does not slide.
The following figure illustrates the allocation and reorganization of the USB memory in a typical
example:
Table 20-1.
i+1
• USBCON
• DPRAM direct access registers (DPADD7:0, UEDATX)
• UDCON
• UDINT
• UDIEN
• WAKEUPI
Endpoint memory automatically slides down. Note that the k
Allocation and reorganization USB memory flow
i
is done when its ALLOC bit is set. Then, the hardware allo-
i+2
and upper Endpoint memory does not slide.
ATmega8U2/16U2/32U2
i-1
and k
i+2
i+1
and upper Endpoint memory
. The k
i+1
Endpoint memory
192

Related parts for ATMEGA16U2-16AU