P83C654X2FBD/CV710 NXP Semiconductors, P83C654X2FBD/CV710 Datasheet - Page 46

• Manufacturer Part Number: P83C654X2FBD/CV710
• Description: 8-bit Microcontrollers - MCU P83C654X2FBD/LQFP44/TRAYBM//CV
• Manufacturer: NXP Semiconductors

Specifications of P83C654X2FBD/CV710

• Core: 80C51
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 16 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 256 B
• Operating Supply Voltage: 5 V
• Package / Case: SOT-187-2
• Mounting Style: SMD/SMT
• Interface Type: I2C, Serial
• Number Of Programmable I/os: 4
• Number Of Timers: 3
• Processor Series: 80C51
• Program Memory Type: OTP EPROM

Philips Semiconductors
Table 11.
Table 12.
2004 Apr 20
STATUS
STATUS
STATUS
STATUS
(S1STA)
(S1STA)
(S1STA)
(S1STA)
CODE
CODE
80C51 8-bit microcontroller family
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
A0H
A8H
B0H
B8H
C0H
C8H
A STOP condition or
repeated START
condition has been
received while still
addressed as
SLV/REC or SLV/TRX
SLV/REC or SLV/TRX
Own SLA+R has
been received; ACK
h
has been returned
Arbitration lost in
SLA+R/W as master;
Own SLA+R has
been received, ACK
has been returned
Data byte in S1DAT
has been transmitted;
ACK has been
ACK has been
received
Data byte in S1DAT
has been transmitted;
NOT ACK h
NOT ACK has been
received
Last data byte in
S1DAT has been
transmitted (AA = 0);
ACK has been
received
STATUS OF THE
STATUS OF THE
STATUS OF THE
STATUS OF THE
Slave Receiver Mode (Continued)
Slave Transmitter Mode
di i
I
I
b
HARDWARE
HARDWARE
HARDWARE
HARDWARE
2
2
C BUS AND
C BUS AND
i
h
d (AA
b
b
d
0)
No STDAT action or
No STDAT action or
No STDAT action or
No STDAT action
Load data byte or
load data byte
Load data byte or
load data byte
Load data byte or
load data byte
No S1DAT action or
no S1DAT action or
no S1DAT action or
no S1DAT action
No S1DAT action or
no S1DAT action or
no S1DAT action or
no S1DAT action
TO/FROM S1DAT
TO/FROM S1DAT
TO/FROM S1DAT
TO/FROM S1DAT
APPLICATION SOFTWARE RESPONSE
APPLICATION SOFTWARE RESPONSE
16 kB OTP/ROM,
STA
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
0
0
1
1
TO S1CON
TO S1CON
STO
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
46
SI
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
AA
01
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK will be received
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK bit will be received
Last data byte will be transmitted and ACK bit will be
received
Data byte will be transmitted; ACK bit will be received
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
Switched to not addressed SLV mode; no recognition
of own SLA or General call address
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1
Switched to not addressed SLV mode; no recognition
of own SLA or General call address. A START
condition will be transmitted when the bus becomes
free
Switched to not addressed SLV mode; Own SLA will
be recognized; General call address will be
recognized if S1ADR.0 = logic 1. A START condition
will be transmitted when the bus becomes free.
NEXT ACTION TAKEN BY I
NEXT ACTION TAKEN BY I
P83C654X2/P87C654X2
2
2
2
2
C HARDWARE
C HARDWARE
Product data