P83C654X2FBD/CV710 NXP Semiconductors, P83C654X2FBD/CV710 Datasheet - Page 14

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P83C654X2FBD/CV710

Manufacturer Part Number
P83C654X2FBD/CV710
Description
8-bit Microcontrollers - MCU P83C654X2FBD/LQFP44/TRAYBM//CV
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P83C654X2FBD/CV710

Core
80C51
Data Bus Width
8 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
16 KB
Data Ram Size
256 B
Operating Supply Voltage
5 V
Package / Case
SOT-187-2
Mounting Style
SMD/SMT
Interface Type
I2C, Serial
Number Of Programmable I/os
4
Number Of Timers
3
Processor Series
80C51
Program Memory Type
OTP EPROM
Philips Semiconductors
2004 Apr 20
80C51 8-bit microcontroller family
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
TCON
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
Timer n
Gate bit
INTn Pin
BIT
TCON.7
TCON.6
TCON.5
TCON.4
TCON.3
TCON.2
TCON.1
TCON.0
OSC
Address = 88H
Bit Addressable
Tn Pin
SYMBOL
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
TRn
d*
TF1
FUNCTION
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or clearing the bit in software.
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or by clearing the bit in software.
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter on/off.
Interrupt 1 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 1 type control bit. Set/cleared by software to specify falling edge/low level triggered
external interrupts.
Interrupt 0 Edge flag. Set by hardware when external interrupt edge detected.
Cleared when interrupt processed.
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level
triggered external interrupts.
7
Figure 3. Timer/Counter 0/1 Mode 0: 13-Bit Timer/Counter
Figure 4. Timer/Counter 0/1 Control (TCON) Register
TR1
16 kB OTP/ROM,
6
C/T = 0
C/T = 1
TF0
5
TR0
4
Control
14
IE1
3
IT1
2
(5 Bits)
TLn
IE0
1
P83C654X2/P87C654X2
(8 Bits)
THn
IT0
0
Reset Value = 00H
TFn
SU01618
Interrupt
SU01516
Product data

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