P83C654X2FBD/CV710 NXP Semiconductors, P83C654X2FBD/CV710 Datasheet - Page 10
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P83C654X2FBD/CV710
Manufacturer Part Number
P83C654X2FBD/CV710
Description
8-bit Microcontrollers - MCU P83C654X2FBD/LQFP44/TRAYBM//CV
Manufacturer
NXP Semiconductors
Datasheet
1.P83C654X2FBDCV710.pdf
(88 pages)
Specifications of P83C654X2FBD/CV710
Core
80C51
Data Bus Width
8 bit
Maximum Clock Frequency
16 MHz
Program Memory Size
16 KB
Data Ram Size
256 B
Operating Supply Voltage
5 V
Package / Case
SOT-187-2
Mounting Style
SMD/SMT
Interface Type
I2C, Serial
Number Of Programmable I/os
4
Number Of Timers
3
Processor Series
80C51
Program Memory Type
OTP EPROM
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Philips Semiconductors
CLOCK CONTROL REGISTER (CKCON)
This device allows control of the 6-clock/12-clock mode by means of
both an SFR bit (X2) and an OTP bit. The OTP clock control bit
Also please note that the clock divider applies to the serial port for
modes 0 and 2 (fixed baud rate modes). This is because modes 1
and 3 (variable baud rate modes) use either Timer 1 or Timer 2.
Below is the truth table for the CPU clock mode.
2004 Apr 20
80C51 8-bit microcontroller family
256B RAM, low voltage (2.7 to 5.5 V), low power, high speed
(30/33 MHz)
CKCON
BIT
CKCON.7
CKCON.6
CKCON.5
CKCON.4
CKCON.3
CKCON.2
CKCON.1
CKCON.0
Not Bit Addressable
Address = 8Fh
SYMBOL
–
X2
FUNCTION
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
Reserved.
CPU clock; 1 = 6 clocks for each machine cycle, 0 = 12 clocks for each machine cycle
–
7
16 kB OTP/ROM,
–
6
Figure 1. Clock control (CKCON) register
–
5
4
–
10
3
–
OX2, when programmed (6-clock mode), supersedes the X2 bit
(CKCON.0). The CKCON register is shown below in Figure 1.
Table 1.
OX2 clock mode bit
(can only be set by
parallel programmer)
erased
erased
programmed
2
–
1
–
P83C654X2/P87C654X2
X2 bit
(CKCON.0)
0
1
X
0
X2
Reset Value = x0000000B
CPU clock mode
12-clock mode
(default)
6-clock mode
6-clock mode
SU01689
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