P5010NSE1VNB Freescale Semiconductor, P5010NSE1VNB Datasheet - Page 157

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P5010NSE1VNB

Manufacturer Part Number
P5010NSE1VNB
Description
Processors - Application Specialized Tmp Enc 2000/1333
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of P5010NSE1VNB

Rohs
yes
3.8
This section provides thermal management information for the flip chip plastic ball grid array (FC-PBGA) package for
air-cooled applications. Proper thermal control design is primarily dependent on the system-level design—the heat sink, airflow,
and thermal interface material.
The recommended attachment method to the heat sink is illustrated in this figure. The heat sink should be attached to the
printed-circuit board with the spring force centered over the die. This spring force should not exceed 10 pounds force (45
Newton).
The system board designer can choose between several types of heat sinks to place on the device. There are several
commercially-available thermal interfaces to choose from in the industry. Ultimately, the final selection of an appropriate heat
sink depends on many factors, such as thermal performance at a given air velocity, spatial volume, mass, attachment method,
assembly, and cost.
3.8.1
For the package, the intrinsic internal conduction thermal resistance paths are as follows:
Freescale Semiconductor
The die junction-to-case thermal resistance
The die junction-to-lid-top thermal resistance
The die junction-to-board thermal resistance
Thermal Management Information
Internal Package Conduction Resistance
Figure 65. Package Exploded Cross-Sectional View—FC-PBGA (w/ Lid) Package
Thermal Interface Material
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
Printed-Circuit Board
Adhesive or
Heat Sink
Heat Sink
Clip
FC-PBGA Package (Small Lid)
Hardware Design Considerations
Die
Die Lid
157

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