P5010NSE1VNB Freescale Semiconductor, P5010NSE1VNB Datasheet - Page 153

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P5010NSE1VNB

Manufacturer Part Number
P5010NSE1VNB
Description
Processors - Application Specialized Tmp Enc 2000/1333
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of P5010NSE1VNB

Rohs
yes
Freescale Semiconductor
2. Populate this with a 1 kΩ resistor for short-circuit/current-limiting protection.
4. Asserting HRESET causes a hard reset on the device. HRESET is not used by the Aurora 22 pin connector.
1. The Aurora port and target board must be able to independently assert PORESET and TRST to the processor
3.This switch is included as a precaution for BSDL testing. The switch must be closed to position A during BSDL testing
Duplex 22 Connector
Notes:
to avoid accidentally asserting the TRST line. If BSDL testing is not being performed, this switch must be closed
to position B.
Physical Pinout
in order to fully control the processor as shown here.
19
13
15
21
11
17
1
1
3
5
7
9
Board Sources
From Target
22
10
12
14
16
18
20
2
4
6
8
(if any)
P5020/P5010 QorIQ Integrated Processor Hardware Specifications, Rev. 0
Figure 62. Aurora 22 Pin Connector Duplex Interface Connection
PORESET
22
12
10
11
17
HRESET
20
18
16
14
13
15
19
21
2
6
8
4
1
7
5
3
9
VIO VSense
COP_TMS
COP_TDO
COP_TDI
COP_TCK
TRST
RESET
Vendor I/O 3 N/C
Vendor I/O 2 (Aurora Event Out)
Vendor I/O 1 (Aurora Event In)
TX0_P
TX0_N
TX1_P
Vendor I/O 0 (Aurora HALT)
TX1_N
RX0_P
RX0_N
RX1_P
RX1_N
2
B
3
A
1 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
10 kΩ
Hardware Design Considerations
OV
DD
HRESET
PORESET
TRST
TMS
TDO
TDI
TCK
EVT[4]
EVT[1]
EVT[0]
SD_TX09_P
SD_TX09_N
SD_TX08_P
SD_TX08_N
SD_RX09_P
SD_RX09_N
SD_RX08_P
SD_RX08_N
P5020/P5010
1
4
1
153

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