E909.06A61DC ELMOS Semiconductor, E909.06A61DC Datasheet - Page 65

• Manufacturer Part Number: E909.06A61DC
• Description: Processors - Application Specialized Halios multipurpose sensor IC - Auto
• Manufacturer: ELMOS Semiconductor

Specifications of E909.06A61DC

• Rohs: yes
• Processor Series: EL16
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 3 kB
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Interface Type: I2C, SPI
• Memory Type: Flash, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Register sci status (0x04)
Table 73: Sci status
Register sci data (in/out) (0x06)
Table 74: Sci data (in/out)
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Bit
Reset value
Internal access
External access
Bit Description
Bit
Reset value
Internal access
External access
Bit Description
HALIOS® MULTI PURPOSE SENSOR FOR AUTOMOTIVE
PRODUCTION DATA - NOV 16, 2011
ELMOS Semiconductor AG
9 : AUTO_BAUD_TRIGGERED
set when new Baud value was copied automatically to baud config register after a
valid SNYC byte measurement (see also measurement control register ->
AUTO_BAUD)
cleared when reading the msb of the status word
8 : AUTO_MEAS_TRIGGERED
set when measurement was started automatically after reception of a valid break
(see also measurement control register -> AUTO_MEAS)
cleared when reading the msb of the status word
7 : TDRE - transmit data register empty
Clear TDRE by writing to sci data reg. Write will be ignored when transmit register
is not empty -> check if TDRE = 1 before writing to transmit register
6 : TC - transmit complete flag
TC is reset to '0' when a transmission is in progress
5 : RDRF - receive data register full flag
Clear RDRF by reading sci status with RDRF set and then reading sci data reg
NOTE: RDRF will be set:
a) in case of data reception: 1/8 nominal bit length after the recognized stop bit,
e.g. since the bits are sampled in the middle of a nominal bit length the flags and with it the
irq will be set after the estimated end of the active stop bit.
b) in case of break reception: see BRF description below
4 : BRF - break received flag (LIN-Mode dependent)
Clear BRF by reading sci status with BRF set and then reading sci data reg.
The BR flag will be set when the start bit is followed by 8 (respectively 9 when Lin Mode is
set) logic 0 data bits and a logic 0 where the stop bit should be.
When BRF is set also FE and RDRF will be set, the SCI data register will be cleared
Note: flag generation (incl BRF) will be suppressed when AUTO_MEAS is set
3 : OV - receiver overrun detected
Clear OV by reading sci status with OV set and then reading sci data reg.
OV will be set when a received data byte is not read before the data byte of the next frame
or a break character arrives. The second data byte will be disallowed
2 : MRUN - measurement running
1 : MF - measurement finish flag
Clear MF by read accessing the measurement counter
0 : FE - framing error flag
FE is set when the logic does not detect a logic 1 where the stop bit should be.
FE will be set and reset together with RDRF
reset value: 0x0000
7:0 : sci data register, write for transmitting byte, read received byte
reset value: 0x0000
15
15
0
R
R
0
R
R
14
14
0
R
R
0
R
R
13
13
0
R
R
0
R
R
12
12
0
0
R
R
R
R
11
11
0
R
R
0
R
R
10
10
0
R
R
0
R
R
Data Sheet
65/71
9
0
R
R
9
0
R
R
8
0
R
R
8
0
R
R
R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
7
0
R
R
7
0
6
0
R
R
6
0
5
0
R
R
5
0
4
0
R
R
4
0
QM-No.: 25DS0049E.02
3
0
R
R
3
0
2
0
R
R
2
1
E909.06
1
0
R
R
1
0
0
0
R
R
0
0