E909.06A61DC ELMOS Semiconductor, E909.06A61DC Datasheet - Page 51

• Manufacturer Part Number: E909.06A61DC
• Description: Processors - Application Specialized Halios multipurpose sensor IC - Auto
• Manufacturer: ELMOS Semiconductor

Specifications of E909.06A61DC

• Rohs: yes
• Processor Series: EL16
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 3 kB
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Interface Type: I2C, SPI
• Memory Type: Flash, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

5.13 Multiplier Module
The hardware multiplier is a peripheral and is not part of the EL16 CPU. This means, its activities do not interfere
with the CPU activities. The multiplier registers are peripheral registers that are loaded and read with CPU instruc-
tions.
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The hardware multiplier supports unsigned multiply, signed multiply, unsigned multiply accumulate, and signed
multiply accumulate operations. The type of operation is selected by the address the first operand is written to.
The hardware multiplier has two 16-bit operand registers, OP1 and OP2, and three result registers, SumLo, SumHi,
and SumExt. SumLo stores the low word of the result, SumHi stores the high word of the result, and SumExt stores
information about the result.
5.13.1 Multiplier Module Registers
Register MPY (0x10)
Table 51: MPY
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Register Name
MPY
MPYS
MAC
MACS
Operand 2
SumLo
SumHi
SumExt
Bit
Reset value
Internal access
External access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit Description
HALIOS® MULTI PURPOSE SENSOR FOR AUTOMOTIVE
PRODUCTION DATA - NOV 16, 2011
ELMOS Semiconductor AG
The hardware multiplier supports:
Unsigned multiply
Signed multiply
Unsigned multiply accumulate
Signed multiply accumulate
16 x 16 bits, 16 x 8 bits, 8 x 16 bits, 8 x 8 bits
CPU is halted until result is valid (1 clock cycle)
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15:0 : Operand 1
unsigned multiply
reset value: 0x000
15
0
14
0
13
0
12
0
Address
0x1A
0x10
0x12
0x14
0x16
0x18
0x1C
0x1E
11
0
10
0
Data Sheet
51/71
9
0
8
0
7
0
6
0
Description
5
0
4
0
QM-No.: 25DS0049E.02
3
0
2
0
E909.06
1
0
0
0