E909.06A61DC ELMOS Semiconductor, E909.06A61DC Datasheet - Page 59

• Manufacturer Part Number: E909.06A61DC
• Description: Processors - Application Specialized Halios multipurpose sensor IC - Auto
• Manufacturer: ELMOS Semiconductor

Specifications of E909.06A61DC

• Rohs: yes
• Processor Series: EL16
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 8 MHz
• Data Ram Size: 3 kB
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Interface Type: I2C, SPI
• Memory Type: Flash, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Register transmit data / receive data (0x00)
Table 64: Transmit data / receive data
Register control (0x02)
Table 65: Control
ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Bit
Reset value
Internal access
External access
Bit Description
Bit
Reset value
Internal access
External access R/W R/W R/W R/W
Bit Description
HALIOS® MULTI PURPOSE SENSOR FOR AUTOMOTIVE
PRODUCTION DATA - NOV 16, 2011
ELMOS Semiconductor AG
R/W R/W R/W R/W
8 : csb control (only for data transition and in master mode)
0 - byte mode
1 - keep csb active after related byte was transmitted
7:0 : transmit data / receive data
reset value: 0x0000
The 'send low water' interrupt will be cleared by writing a byte to the transmit data register
(FIFO).
The 'receive high water' interrupt will be cleared by reading a byte from the receive data reg-
ister (FIFO).
(see List Of All Interrupts)
14:12 : high water receive FIFO level
interrupt will be asserted when receive FIFO fill level increases to this value
default value: 2
10:8 : low water transmit FIFO level
interrupt will be asserted when transmit FIFO fill level decreases to this value
default value: 0
3 : slave
0 - master
1 - slave
2 : polarity: SSCPO, see SPI mode diagram
0 - clock off level 0
1 - clock off level 1
1 : phase: SSCPH, see SPI mode diagram
0 - 1st edge shift, 2nd edge sample
1 - 1st edge sample, 2nd edge shift
0 : order
0 - LSB first
1 - MSB first
15
15
0
R
R
0
14
14
0
R
R
0
13
13
0
R
R
1
12
12
0
0
R
R
11
11
0
R
R
0
R
R
R/W R/W R/W
R/W R/W R/W
10
10
0
R
R
0
Data Sheet
59/71
9
0
R
R
9
0
(R)
(R)
W
W
8
0
8
0
R/W R/W R/W R/W R/W R/W R/W R/W
R/W R/W R/W R/W R/W R/W R/W R/W
7
0
7
0
R
R
6
0
6
0
R
R
5
0
5
0
R
R
4
0
4
0
R
R
QM-No.: 25DS0049E.02
R/W R/W R/W R/W
R/W R/W R/W R/W
3
0
3
1
2
0
2
0
E909.06
1
0
1
0
0
0
0
1