DS26514G Maxim Integrated, DS26514G Datasheet - Page 78

• Manufacturer Part Number: DS26514G
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26514G

• Part # Aliases: 90-26514-G00

Figure 9-18. HDLC Message Transmit Example
9.10.3 HDLC-256 Controller
This device has an enhanced HDLC controller that can be mapped into up to 32 time slots, or Sa4 to Sa8 bits (E1
Mode) or the FDL (T1 Mode). This HDLC controller has a 256-byte FIFO buffer in both the transmit and receive
paths. The user can select any specific bits within the time slot(s) to assign to the HDLC-256 controller, as well as
specific Sa bits (E1 Mode)
19-5856; Rev 4; 5/11
Work Another Process
Loop N
No Action Required
A
(THC1,THC2,THBSE,THFC)
Push Message Byte
into Tx HDLC FIFO
Configure Transmit
Verify TLWM Clear
HDLC Controller
HDLC Controller
Reset Transmit
N = TFBA[6..0]
Enable TLWM
Interrupt and
Read TFBA
Last Byte of
Message?
Interrupt?
(THC.5)
TLWM
(THF)
NO
YES
Disable TMEND Interrupt
Prepare New
Message
NO
YES
A
NO
Disable TMEND Interrupt
Enable TMEND
Resend Message
Push Last Byte
into Tx FIFO
Read TUDR
TUDR = 1
Set TEOM
Interrupt?
Status Bit
(THC1.2)
Interrupt
TMEND
DS26514 4-Port T1/E1/J1 Transceiver
YES
YES
NO
A
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