DS26514G Maxim Integrated, DS26514G Datasheet - Page 297

• Manufacturer Part Number: DS26514G
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26514G

• Part # Aliases: 90-26514-G00

14.
The DS26514 IEEE 1149.1 design supports the standard instruction codes SAMPLE:PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, and IDCODE. See
contains the following as required by IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture.
The Test Access Port has the necessary interface pins: JTRST, JTCLK, JTMS, JTDI, and JTDO. See the pin
descriptions for details.
Figure 14-1. JTAG Functional Block Diagram
19-5856; Rev 4; 5/11
JTAG BOUNDARY SCAN AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
10kΩ
V
DD
JTDI
10kΩ
V
DD
JTMS
TEST ACCESS PORT
BOUNDRY SCAN
IDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
10kΩ
V
DD
JTRST
SELECT
OUTPUT ENABLE
Bypass Register
Boundary Scan Register
Device Identification Register
MUX
DS26514 4-Port T1/E1/J1 Transceiver
Table
JTDO
14-1. The DS26514
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