DS26514G Maxim Integrated, DS26514G Datasheet - Page 299
DS26514G
Manufacturer Part Number
DS26514G
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26514G.pdf
(305 pages)
Specifications of DS26514G
Part # Aliases
90-26514-G00
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for the instruction register. JTMS HIGH during a rising edge on JTCLK puts the controller back into the Test-Logic-
Reset state.
14.1.11
The Capture-IR state is used to load the shift register in the instruction register with a fixed value. This value is
loaded on the rising edge of JTCLK. If JTMS is HIGH on the rising edge of JTCLK, the controller enters the Exit1-
IR state. If JTMS is LOW on the rising edge of JTCLK, the controller enters the Shift-IR state.
14.1.12
In this state, the shift register in the instruction register is connected between JTDI and JTDO and shifts data one
stage for every rising edge of JTCLK towards the serial output. The parallel register, as well as all test registers,
remains at their previous states. A rising edge on JTCLK with JTMS HIGH moves the controller to the Exit1-IR
state. A rising edge on JTCLK with JTMS LOW keeps the controller in the Shift-IR state while moving data one
stage through the instruction shift register.
14.1.13
A rising edge on JTCLK with JTMS LOW puts the controller in the Pause-IR state. If JTMS is HIGH on the rising
edge of JTCLK, the controller enters the Update-IR state and terminates the scanning process.
14.1.14
Shifting of the instruction shift register is halted temporarily. With JTMS HIGH, a rising edge on JTCLK puts the
controller in the Exit2-IR state. The controller remains in the Pause-IR state if JTMS is LOW during a rising edge on
JTCLK.
14.1.15
A rising edge on JTCLK with JTMS LOW puts the controller in the Update-IR state. The controller loops back to
Shift-IR if JTMS is HIGH during a rising edge of JTCLK in this state.
14.1.16
The instruction code shifted into the instruction shift register is latched into the parallel output on the falling edge of
JTCLK as the controller enters this state. Once latched, this instruction becomes the current instruction. A rising
edge on JTCLK with JTMS LOW puts the controller in the Run-Test-Idle state. With JTMS HIGH, the controller
enters the Select-DR-Scan state.
19-5856; Rev 4; 5/11
Capture-IR
Shift-IR
Exit1-IR
Pause-IR
Exit2-IR
Update-IR
DS26514 4-Port T1/E1/J1 Transceiver
299 of 305
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