74VHC595M_Q Fairchild Semiconductor, 74VHC595M_Q Datasheet

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74VHC595M_Q

Manufacturer Part Number
74VHC595M_Q
Description
Counter Shift Registers 8-Bit Shift Register
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74VHC595M_Q

Counting Sequence
Serial to Serial/Parallel
Number Of Circuits
6
Package / Case
SOIC-16
Logic Family
74VHC
Logic Type
CMOS
Number Of Input Lines
1
Output Type
3-State
Propagation Delay Time
16.5 ns, 10.2 ns
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Function
Shift Register
Mounting Style
SMD/SMT
Number Of Output Lines
3
Operating Supply Voltage
2 V to 5.5 V
Supply Voltage - Max
5.5 V
©1993 Fairchild Semiconductor Corporation
74VHC595 Rev. 1.2
74VHC595
8-Bit Shift Register with Output Latches
Features
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
74VHC595M
74VHC595SJ
74VHC595MTC
High Speed: t
Low power dissipation: I
High noise immunity: V
Power down protection is provided on all inputs
Low noise: V
Pin and function compatible with 74HC595
Number
Order
OLP
PD
Package
Number
5.4ns (Typ.) at V
MTC16
0.9V (Typ.)
M16D
M16A
NIH
CC
V
4µA (Max.) at T
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
NIL
CC
28% V
5V
CC
A
(Min.)
25°C
General Description
The VHC595 is an advanced high-speed CMOS Shift
Register fabricated with silicon gate CMOS technology.
It achieves the high-speed operation similar to equiva-
lent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
This device contains an 8-bit serial-in, parallel-out shift
register that feeds an 8-bit D-type storage register. The
storage register has eight 3-STATE outputs. Separate
clocks are provided for both the shift register and the
storage register. The shift register has a direct-overriding
clear, serial input, and serial output (standard) pins for
cascading. Both the shift register and storage register
use positive-edge triggered clocks. If both clocks are
connected together, the shift register state will always be
one clock pulse ahead of the storage register.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Package Description
www.fairchildsemi.com
May 2007
tm

Related parts for 74VHC595M_Q

74VHC595M_Q Summary of contents

Page 1

... M16D 74VHC595MTC MTC16 Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 General Description 5V The VHC595 is an advanced high-speed CMOS Shift CC Register fabricated with silicon gate CMOS technology. ...

Page 2

... Q’ Serial Data Output H Truth Table Inputs SER RCK SCK ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 Logic Symbol SCLR thru Q 3-STATE thru Q outputs enabled Shift Register cleared ...

Page 3

... Timing Diagram ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 3 www.fairchildsemi.com ...

Page 4

... Logic Diagram (positive logic) ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 4 www.fairchildsemi.com ...

Page 5

... Operating Temperature OPR Input Rise and Fall Time 3.3V ±0. 5.0V ±0.5V CC Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 Parameter (1) Parameter 5 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ±75mA – ...

Page 6

... V Quiet Output Minimum OLV Dynamic V OL (2) V Minimum HIGH Level IHD Dynamic Input Voltage (2) V Maximum LOW Level ILD Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 (V) Conditions Min. CC 2.0 1.50 0 2.0 2 –50µA 1 ...

Page 7

... PD current consumption without load. Average operating current can be obtained by the equation: I (Opr.) C • V • ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 V (V) Conditions CC 3.3 ± 0.3 C 15pF L C 50pF L 5.0 ± ...

Page 8

... Minimum Hold Time (SCLR–RCK Minimum Pulse Width (SCLR) W( Minimum Pulse Width (SCK) W(L) W( (H) Minimum Pulse Width (RCK) W( Minimum Removal Time (SCLR–SCK) rem ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 T 25° (V) Typ. Guaranteed Minimum CC 3.3 ± 0.3 3.5 5.0 ± 0.5 3.0 3.3 ± 0.3 8.0 5.0 ± 0.5 5.0 3.3 ± ...

Page 9

... Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 Package Number M16A 9 www.fairchildsemi.com ...

Page 10

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 Package Number M16D 10 www.fairchildsemi.com ...

Page 11

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. 5.00±0.10 0.11 MTC16rev4 Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1993 Fairchild Semiconductor Corporation 74VHC595 Rev. 1.2 4.55 4.4±0.1 Package Number MTC16 11 5.90 4.45 0.65 1.45 5.00 12° www.fairchildsemi.com 7.35 ...

Page 12

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world.™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ ...

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