MAX5825BAUP+ Maxim Integrated, MAX5825BAUP+ Datasheet - Page 28

• Manufacturer Part Number: MAX5825BAUP+
• Description: Digital to Analog Converters - DAC 12-Bit 8Ch V DAC w/I2C Interface
• Manufacturer: Maxim Integrated

Specifications of MAX5825BAUP+

• Rohs: yes
• Number Of Dac Outputs: 8
• Resolution: 12 bit
• Interface Type: I2C
• Settling Time: 4.5 us
• Maximum Operating Temperature: - 40 C to + 125 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-20
• Maximum Power Dissipation: 1084 mW
• Supply Current: 250 uA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

The POWER command (B[23:20] = 0100) updates the
power mode settings of the selected DACs. DACs that
are not selected do not update their power settings in
response to the command. The new power setting is
determined by bits PD[1:0] (B[7:6]) while the affected
DAC(s) are selected using B[15:8]). If all DACs are pow-
ered down and the RF2 bit is not set, the device enters
a STANDBY mode (all analog circuitry is disabled). This
command is inaccessible when a watchdog timeout has
Table 9. POWER Command Format
The CONFIG command (B[23:16] = 0101) updates the
watchdog, gate, load, and clear mode settings of the
selected DACs. DACs which are not selected do not
update their settings in response to the command. The
new mode settings to be written are determined by bits
B[7:3] while the affected DAC(s) are selected by B[15:8].
This command is inaccessible when a watchdog timeout
has occurred and the watchdog timer is configured with
a safety level of high or max.
Watchdog Configuration:
WDOG Config settings are written by WC[1:0] (B[7:6]):
DISABLE (WC = 00): Watchdog timeout does not affect
the operation of the selected DAC.
GATE (WC = 01): DAC code is gated to DEFAULT value
in response to watchdog timeouts. Unless otherwise
prohibited by the watchdog safety level, LDAC, CLR,
Maxim Integrated
Output DACs with Internal Reference and I
B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9
0
POWER Command
1
0
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Default Value →
Command Byte
0
0
Reserved
0
0
CONFIG Command
POWER Command
0
7
1
6
1
MAX5823/MAX5824/MAX5825
Multiple DAC Selection
5
1
Data High Byte
4
1
occurred and the watchdog timer is configured with a
safety level of high or max.
Available power modes (PD[1:0]):
Normal (00): DAC channel is active (default),
PD 1kω (01): Power down with 1kω termination to GND,
PD 100kω (10): Power down with 100kω termination to
GND,
PD Hi-Z (11): Power down with high-impedance output.
and write operations to the CODE and DAC registers are
accepted but will not be reflected on the DAC output until
the watchdog timeout status is reset.
CLR (WC = 10): CODE and DAC register contents are
cleared to DEFAULT value in response to watchdog time-
outs. All writes to CODE and DAC registers are ignored
and LDAC or CLR input activity has no effect until the
watchdog timeout status is reset, regardless of watchdog
safety level.
HOLD (WC = 11): DAC code is held at its previously
programmed value in response to watchdog time-out.
All writes to DAC and CODE registers are ignored and
LDAC or CLR input activity has no effect until the watch-
dog timeout status is reset, regardless of watchdog
safety level.
Note: For the watchdog to timeout and have an impact,
the function must first be enabled and configured using
the WDOG command.
3
1
2
1
1
1
B8
0
1
PD1 PD0
11 = Hi-Z
01 = 1kW
B7
Normal
0
100kW
Power
Mode:
00 =
10 =
B6
0
2
B5 B4 B3
Data Low Byte
X
X
C Interface
X
X
Don’t Care
X
X
B2 B1 B0
X
X
X
X
X
X
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