FXL3SD206UMX Fairchild Semiconductor, FXL3SD206UMX Datasheet - Page 4

TRANSLATOR MUX/DEMUX SDIO 24MLP

FXL3SD206UMX

Manufacturer Part Number
FXL3SD206UMX
Description
TRANSLATOR MUX/DEMUX SDIO 24MLP
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of FXL3SD206UMX

Logic Function
Level Shifter
Number Of Bits
4
Input Type
Voltage
Output Type
Voltage
Data Rate
100Mbps
Number Of Channels
1
Number Of Outputs/channel
4
Differential - Input:output
No/No
Propagation Delay (max)
3.5ns
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-UMLP
Supply Voltage
1.65 V ~ 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
FXL3SD206UMXTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FXL3SD206UMX
Manufacturer:
FSC
Quantity:
5 000
© 2009 Fairchild Semiconductor Corporation
FXL3SD206 • Rev. 1.0.0
Function Diagram
Function Table
Note:
1.
VDD_CON: This is a power supply pin that is used by the three control pins (VDD_SEL, CH_SEL, and OE).
In single host mode, VDD_CON should be tied to the same supply as the VDDA pin. In dual host mode,
VDD_CON should be tied to the same supply as either the VDD_HI or the VDD_LO pin, depending upon which
host is used to drive the control pins.
HIGH
HIGH
HIGH
HIGH
LOW
OE
Don’t Care
CH_SEL
HIGH
HIGH
LOW
LOW
Figure 4. Function Diagram
VDD_SEL
Don’t Care
HIGH
HIGH
LOW
LOW
4
3-State
Normal operation; Port A to Port B channel
selected; Port B tracks VDD_HI level
Normal operation; Port A to Port B channel
selected; Port B tracks VDD_LO level
Normal operation; Port A to Port C channel
selected; Port C tracks VDD_HI level
Normal operation; Port A to Port C channel
selected; Port C tracks VDD_LO level
Output
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