MK10DN64VLF5 Freescale Semiconductor, MK10DN64VLF5 Datasheet - Page 49

• Manufacturer Part Number: MK10DN64VLF5
• Description: ARM Microcontrollers - MCU Kinetis 64K
• Manufacturer: Freescale Semiconductor

Specifications of MK10DN64VLF5

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: K10P32M50SF0
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

6.8.5.1 Normal Run, Wait and Stop mode performance over the full
This section provides the operating performance over the full operating voltage for the
device in Normal Run, Wait and Stop modes.
Freescale Semiconductor, Inc.
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
I2S_MCLK (output)
I2S_TX_BCLK/
I2S_RX_BCLK (output)
I2S_TX_FS/
I2S_RX_FS (output)
I2S_TX_FS/
I2S_RX_FS (input)
I2S_TXD
I2S_RXD
Num.
operating voltage range
Operating voltage
I2S_MCLK cycle time
I2S_MCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK cycle time (output)
I2S_TX_BCLK/I2S_RX_BCLK pulse width high/low
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output valid
I2S_TX_BCLK/I2S_RX_BCLK to I2S_TX_FS/
I2S_RX_FS output invalid
I2S_TX_BCLK to I2S_TXD valid
I2S_TX_BCLK to I2S_TXD invalid
I2S_RXD/I2S_RX_FS input setup before
I2S_RX_BCLK
I2S_RXD/I2S_RX_FS input hold after I2S_RX_BCLK
S5
S7
Figure 19. I2S/SAI timing — master modes
Characteristic
Table 34. I2S/SAI master mode timing
S4
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
S9
S9
S1
S3
S2
S10
S4
S2
S8
1.71
40
45%
80
45%
—
0
—
0
25
0
S7
Peripheral operating requirements and behaviors
Min.
3.6
—
55%
—
55%
15
—
15
—
—
—
Max.
V
ns
MCLK period
ns
BCLK period
ns
ns
ns
ns
ns
ns
Unit
S10
S6
S8
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