S9S12G128F0VLLR Freescale Semiconductor, S9S12G128F0VLLR Datasheet - Page 474
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S9S12G128F0VLLR
Manufacturer Part Number
S9S12G128F0VLLR
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G128F0VLLR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G128F0VLLR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Analog-to-Digital Converter (ADC10B12CV2)
13.3.2
This section describes in address order all the ADC10B12C registers and their individual bits.
13.3.2.1
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime, in special modes always write 0 to Reserved Bit 7.
476
Module Base + 0x0000
WRAP[3-0]
Reset
Field
3-0
W
R
Reserved
Register Descriptions
Wrap Around Channel Select Bits — These bits determine the channel for wrap around when doing
multi-channel conversions. The coding is summarized in
ATD Control Register 0 (ATDCTL0)
0
7
WRAP3 WRAP2 WRAP1 WRAP0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
= Unimplemented or Reserved
0
0
6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Table 13-2. Multi-Channel Wrap Around Coding
Figure 13-3. ATD Control Register 0 (ATDCTL0)
Table 13-1. ATDCTL0 Field Descriptions
MC9S12G Family Reference Manual,
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
5
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
4
Multiple Channel Conversions (MULT = 1)
Description
Wraparound to AN0 after Converting
WRAP3
Table
1
3
13-2.
Reserved
Rev.1.23
AN10
AN11
AN11
AN11
AN11
AN11
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
WRAP2
1
1
2
WRAP1
Freescale Semiconductor
1
1
WRAP0
1
0
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