S9S12G128F0VLLR Freescale Semiconductor, S9S12G128F0VLLR Datasheet - Page 239
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S9S12G128F0VLLR
Manufacturer Part Number
S9S12G128F0VLLR
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G128F0VLLR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-100
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G128F0VLLR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1
1
2.4.3.53
2.4.3.54
Freescale Semiconductor
Address 0x0274 (G1, G2)
Address 0x0274 (G3)
DDR0AD
Address 0x0275
PTI1AD
Read: Anytime
Write: Anytime
Read: Anytime
Write: Anytime
Field
Field
Reset
Reset
Reset
7-0
7-0
W
W
W
R
R
R
DDR0AD7
DDR1AD7
Port AD input data—
A read always returns the buffered input state of the associated pin. It can be used to detect overload or short circuit
conditions on output pins.
Port AD data direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Port AD Data Direction Register (DDR0AD)
0
0
0
Port AD Data Direction Register (DDR1AD)
0
7
7
7
DDR0AD6
DDR1AD6
Figure 2-53. Port AD Data Direction Register (DDR0AD)
Figure 2-54. Port AD Data Direction Register (DDR1AD)
0
0
0
0
6
6
6
Table 2-79. DDR0AD Register Field Descriptions
Table 2-78. PTI1AD Register Field Descriptions
MC9S12G Family Reference Manual, Rev.1.23
DDR0AD5
DDR1AD5
0
0
0
0
5
5
5
DDR0AD4
DDR1AD4
0
0
0
0
4
4
4
Description
Description
DDR0AD3
DDR0AD3
DDR1AD3
3
0
3
0
3
0
DDR0AD2
DDR0AD2
DDR1AD2
0
0
0
2
2
2
Port Integration Module (S12GPIMV1)
DDR0AD1
DDR0AD1
DDR1AD1
Access: User read/write
Access: User read/write
Access: User read/write
0
0
0
1
1
1
DDR0AD0
DDR0AD0
DDR1AD0
0
0
0
0
0
0
241
1
1
1
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