FM33256B-G Cypress Semiconductor, FM33256B-G Datasheet - Page 10

• Manufacturer Part Number: FM33256B-G
• Description: Real Time Clock 256Kb F-RAM Processor Companion
• Manufacturer: Cypress Semiconductor

Specifications of FM33256B-G

• Rohs: yes
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-14
• Factory Pack Quantity: 56

Trickle Charger
To facilitate capacitor backup, the VBAK pin can
optionally provide a trickle charge current. When the
VBC bit (register 18h bit 3) is set to a ‘1’, the V
pin will source approximately 80 µA until V
reaches V
without an external diode and resistor charger.
There is a Fast Charge mode which is enabled by the
FC bit (register 18h, bit 2). In this mode the trickle
charger current is set to approximately 1 mA,
allowing a large backup capacitor to charge more
quickly.

the VBC bit to 0 to prevent battery charging. The
VBAK circuitry includes an internal 1 K
resistor as a safety element. The trickle charger is UL
Recognized.
Calibration
When the CAL bit in register 00h is set to a ‘1’, the
clock enters calibration mode. The FM33256B
employs a digital method for calibrating the crystal
oscillator frequency. The digital calibration scheme
applies a digital correction to the RTC counters based
on the calibration settings, CALS and CAL.4-0. In
calibration mode (CAL=1), the ACS pin is driven
with a 512 Hz (nominal) square wave and the alarm
is temporarily unavailable. Any measured deviation
from 512 Hz translates into a timekeeping error. The
user measures the frequency and writes the
appropriate correction value to the calibration
register. The correction codes are listed in the table
below. For convenience, the table also shows the
frequency error in ppm. Positive ppm errors require a
negative adjustment that removes pulses. Negative
ppm errors require a positive correction that adds
pulses. Positive ppm adjustments have the CALS
(sign) bit set to 1, where as negative ppm adjustments
have CALS = 0. After calibration, the clock will have
a maximum error of ± 2.17 ppm or ± 0.09 minutes
per month at the calibrated temperature.
The user will not be able to see the effect of the
calibration setting on the 512 Hz output.
addition or subtraction of digital pulses occurs after
the 512 Hz output.
This product conforms to specifications per the terms of the Ramtron
standard warranty. The product has completed Ramtron’s internal
qualification testing and has reached production status.
Rev. 3.0
Aug. 2012
• In the case where no battery is used, the V
Note: systems using lithium batteries should clear
pin should be tied to V
DD
. This charges the capacitor to V
SS
and VBC bit cleared.
Ω
BAK
series
The
BAK
BAK
DD
layer is preferred. See layout example. Red is the top
layer, green is the bottom layer.
The calibration setting is stored in F-RAM so it is not
lost should the backup source fail. It is accessed with
bits CAL.4-0 in register 01h. This value only can be
written when the CAL bit is set to a 1. To exit the
calibration mode, the user must clear the CAL bit to a
logic 0. When the CAL bit is 0, the ACS pin will
revert to the function according to Table 2.
Crystal Type
The crystal oscillator is designed to use a 12.5pF
crystal without the need for external components,
such as loading capacitors. The FM33256B device
has built-in loading capacitors that match the crystal.
If a 32.768kHz crystal is not used, an external
oscillator may be connected to the FM33256B. Refer
to Application Note AN407 for recommendations on
how to implement this.
Layout Recommendations
The X1 and X2 crystal pins employ very high
impedance circuits and the oscillator connected to
these pins can be upset by noise or extra loading. To
reduce RTC clock errors from signal switching noise,
a guard ring should be placed around these pads and
the guard ring grounded. High speed SPI traces
should be routed away from the X1/X2 pads. The X1
and X2 trace lengths should be less than 5 mm. The
use of a ground plane on the backside or inner board
1850 Ramtron Drive, Colorado Springs, CO 80921
FM33256B SPI Companion w/ FRAM
Ramtron International Corporation
(800) 545-FRAM, [phone]
www.ramtron.com
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