LFE2-6E-5TN144CES Lattice Semiconductor, LFE2-6E-5TN144CES Datasheet - Page 97

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LFE2-6E-5TN144CES

Manufacturer Part Number
LFE2-6E-5TN144CES
Description
Semiconductors and Actives, programmable, Programmable Logic (FPGAs, PALs, CPLDs ...), gate
Manufacturer
Lattice Semiconductor
Datasheet
Lattice Semiconductor
Figure 3-17. sysCONFIG Slave Serial Port Timing
Figure 3-18. Power-On-Reset (POR) Timing
Figure 3-19. Configuration from PROGRAMN Timing
V
1. Time taken from V
2. Device is in a Master Mode (SPI, SPIm).
3. The CFG pins are normally static (hard wired).
PROGRAMN
CCLK (input)
1. The CFG pins are normally static (hard wired)
CC
USER I/O
CFG[2:0]
/V
CFG[2:0]
CCAUX
DONE
DONE
INITN
CCLK
INITN
CCLK
DOUT
DIN
1
2
3
1
CC
or V
CCAUX
t
t
DPPINIT
DINITD
, whichever is the last to reach its V
t
IODISS
t
PRGMRJ
t
ICFG
t
SUCFG
t
SUSCDI
t
VMC
3-46
t
SSCL
Valid
MIN
.
t
HCFG
DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
t
CODO
t
DINIT
t
SSCH
t
HSCDI
t
SUCFG
Valid
t
HCFG

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