A42MX09-1TQG176M Microsemi, A42MX09-1TQG176M Datasheet - Page 50

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A42MX09-1TQG176M

Manufacturer Part Number
A42MX09-1TQG176M
Description
Ic Fpga Mx Sgl Chip 14k 176-Tqfp
Manufacturer
Microsemi
Datasheet

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TDO, I/O
Serial data output for BST instructions and test data. This
pin functions as an I/O when "Reserve JTAG" is not
checked in the Designer software. BST pins are only
available in the A42MX24 and A42MX36 devices.
TMS, I/O
The TMS pin controls the use of the IEEE 1149.1
Boundary Scan pins (TCK, TDI, TDO). In flexible mode
when the TMS pin is set LOW, the TCK, TDI and TDO pins
are boundary-scan pins. Once the boundary scan pins are
in test mode, they will remain in that mode until the
internal boundary scan state machine reaches the "logic
reset" state. At this point, the boundary scan pins will be
released and will function as regular I/O pins. The "logic
reset" state is reached five TCK cycles after the TMS pin is
set High. In dedicated test mode, TMS functions as
specified in the IEEE 1149.1 specifications. IEEE JTAG
specification recommends a 10kΩ pull-up resistor on the
pin. BST pins are only available in A42MX24 and
A42MX36 devices.
1 -4 6
40MX and 42MX Automotive FPGA Families
Test Data Out
Test Mode Select
v3.1
V
Supply voltage for 40MX devices.
V
Supply voltage for array in 42MX devices.
V
Supply voltage for I/Os in 42MX devices.
WD, I/O
When a wide decode module is used in a an A42MX24 or
A42MX36 device, this pin can be used as a dedicated
output from the wide decode module. This direct
connection eliminates additional interconnect delays
associated with regular logic modules. To implement the
direct I/O connection, connect an output buffer of any
type to the output of the wide decode macro and place
this output on one of the reserved WD pins. When a
wide decode module is not used, this pin functions as a
regular I/O pin.
CC
CCA
CCI
Supply Voltage
Supply Voltage
Supply Voltage
Wide Decode Output

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