A42MX09-1TQG176M Microsemi, A42MX09-1TQG176M Datasheet - Page 10

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A42MX09-1TQG176M

Manufacturer Part Number
A42MX09-1TQG176M
Description
Ic Fpga Mx Sgl Chip 14k 176-Tqfp
Manufacturer
Microsemi
Datasheet

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A42MX09-1TQG176M
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Power Supply
Automotive MX devices are designed to operate in 5.0V environments.
automotive MX devices.
Table 1-1 • Voltage Support of Automotive-Grade MX Devices
Power-Up/Down
When powering up MX devices, V
than or equal to V
sequence. If V
the input protection junction on the I/Os will be forward-
biased or the I/Os will be at logical High, and I
high levels. During power-down, V
than or equal to V
Test Circuitry and Silicon Explorer II Probe
MX devices contain probing circuitry that provides built-
in access to every node in a design, via the use of Silicon
Explorer II. Silicon Explorer II is an integrated hardware
and software solution that, in conjunction with the
Designer software, allow users to examine any of the
internal nodes of the device while it is operating in a
prototyping or a production system. The user can probe
an MX device without changing the placement and
routing of the design and without using any additional
resources. Silicon Explorer II's noninvasive method does
not alter timing or loading effects, thus shortening the
debug cycle and providing a true representation of the
device under actual functional situations.
Silicon
(asynchronous) or 66 MHz (synchronous). Silicon Explorer
II attaches to a PC's standard serial port, turning the PC
into a fully functional 18-channel logic analyzer. Silicon
Explorer II allows designers to complete the design
verification
verification time from several hours per cycle to a few
seconds.
1 -6
Device
40MX
42MX
40MX and 42MX Automotive FPGA Families
Explorer
process
CCI
5.0V
V
exceeds V
CC
CCI
II
.
at
CCI
samples
CCA
their
V
throughout the power-up
5.0V
CCA
during power-up, either
data
desks
CCA
CCA
must be greater
must be smaller
V
5.0V
at
CCI
and
100
CC
reduces
rises to
Maximum Input Tolerance
MHz
v3.1
Silicon Explorer II is used to control the MODE, DCLK, SDI
and SDO pins in MX devices to select the desired nets for
debugging. The user simply assigns the selected internal
nets in the Silicon Explorer II software to the PRA/PRB
output pins for observation. Probing functionality is
activated when the MODE pin is held HIGH.
Figure 1-11 on page 1-7
between Silicon Explorer II and 40MX devices, while
Figure 1-12 on page 1-7
between Silicon Explorer II and 42MX devices
To allow for probing capabilities, the security fuses must
not be programmed. (Refer to
page 1-5
devices).
device configurations for probing.
PRA and PRB pins are dual-purpose pins. When the
"Reserve
Designer software, PRA and PRB pins are reserved as
dedicated outputs for probing. If PRA and PRB pins are
required as user I/Os to achieve successful layout and
"Reserve Probe Pin" is checked, the layout tool will
override the option and place user I/Os on PRA and PRB
pins.
5.25V
5.25V
Table 1-2 on page 1-7
for the security fuses of 40MX and 42MX
Probe
Table 1-1
Pin"
describes the voltage settings of
Nominal Output Voltage
illustrates the interconnection
illustrates the interconnection
is
"User Security" section on
summarizes the possible
checked
5.0V
5.0V
in
the

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