P4C1023 PYRAMID [Pyramid Semiconductor Corporation], P4C1023 Datasheet
P4C1023
Related parts for P4C1023
P4C1023 Summary of contents
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... The input/output pins stay in the HIGH Z state when either CE is HIGH LOW. The P4C1023L is packaged in a 32-pin 400 or 600 mil ceramic DIP and in a 32-pin ceramic SOJ. PIN CONFIGURATION 1 ...
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... P4C1023/P4C1023L RECOMMENDED OPERATING TEMPERATURE & SUPPLY VOLTAGE Temperature Range (Ambient) Commercial (0°C to 70°C) Industrial (-40°C to 85°C) Military (-55°C to 125°C) MAXIMUM RATINGS Stresses greater than those listed can cause permanent damage to the device. These are absolute stress ratings only. ...
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... Military (min), CE and WE V (max high. Switching -55 Max Min Min P4C1023/P4C1023L Unit Max Unit mA -70 Unit Max Page ...
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... P4C1023/P4C1023L READ CYCLE NO CONTROLLED) READ CYCLE NO. 2 (ADDRESS CONTROLLED) READ CYCLE NO CONTROLLED Notes HIGH for READ cycle and OE are LOW for READ cycle. 3. ADDRESS must be valid prior to, or coincident with later of CE transition LOW. ...
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... OE is LOW for this WRITE cycle to show twz and tow. 8. Write Cycle Time is measured from the last valid address to the first transitioning address. Document # SRAM126 REV OR -55 Min Max Min (6) P4C1023/P4C1023L -70 Unit Max Page ...
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... See Figures 1 and 2 * including scope and test fixture. Note: Because of the high speed of the P4C1023L, care must be taken when testing this device; an inadequate setup can cause a normal function- ing part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the V directly up to the contactor fingers. A 0.01 µ ...
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... CE V -0. LOW V DATA RETENTION WAVEFORM CC Document # SRAM126 REV OR Test Conditions CE V -0.2V -0. 2. 3.0V DR See Retention Waveform 0.2V 0.2V 0.2V -0. P4C1023/P4C1023L Min Max 2.0 5.5 0.2V 50 100 0.2V IN Page Unit V µA µ ...
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... P4C1023/P4C1023L ORDERING INFORMATION SELECTION GUIDE The P4C1023L is available in the following temperature, speed and package options. Temperature Package Range Commercial Side Brazed DIP (400 mil) Side Brazed DIP (600 mil) Ceramic SOJ Industrial Side Brazed DIP (400 mil) Side Brazed DIP (600 mil) ...
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... C10 # Pins 32 (600 mil) Symbol Min Max A - 0.225 b 0.014 0.026 b2 0.045 0.065 C 0.008 0.018 D - 1.680 E 0.510 0.620 eA 0.600 BSC e 0.100 BSC L 0.125 0.200 Q 0.015 0.070 S1 0.005 - S2 0.005 - Document # SRAM126 REV OR SIDEBRAZED DUAL IN-LINE PACKAGE SIDEBRAZED DUAL IN-LINE PACKAGE P4C1023/P4C1023L Page ...
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... P4C1023/P4C1023L CERAMIC SOJ SMALL OUTLINE IC PACKAGE CJ1 Pkg # # Pins 32 Symbol Min Max A 0.120 0.165 A1 0.088 0.120 A2 0.070 REF B 0.010 REF B1 0.030R TYP B2 0.020 REF B3 0.025 0.045 D 0.816 0.838 D1 0.750 REF E 0.419 0.431 E1 0.430 0.445 E2 0.360 0.380 e 0.050 BSC e1 0.038 TYP e2 0.005 j 0 ...
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... REVISIONS DOCUMENT NUMBER: SRAM126 DOCUMENT TITLE: P4C1023 / P4C1023L LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM ORIG. OF ISSUE REV. DATE CHANGE OR Oct-05 JDB Document # SRAM126 REV OR DESCRIPTION OF CHANGE New Data Sheet P4C1023/P4C1023L Page ...