P4C422-10CC PYRAMID [Pyramid Semiconductor Corporation], P4C422-10CC Datasheet

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P4C422-10CC

Manufacturer Part Number
P4C422-10CC
Description
HIGH SPEED 256 x 4 STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
P4C422
HIGH SPEED 256 x 4
STATIC CMOS RAM
FEATURES
DESCRIPTION
The P4C422 is a 1,024-bit high-speed (10ns) Static
RAM with a 256 x 4 organization. The memory requires
no clocks or refreshing and has equal access and cycle
times. Inputs and outputs are fully TTL compatible.
Operation is from a single 5 Volt supply. Easy memory
expansion is provided by an active LOW chip select one
(CS
3-state outputs.
FUNCTIONAL BLOCK DIAGRAM
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25/35 ns (Commercial)
– 15/20/25/35 ns (Military)
CMOS for Low Power
– 495 mW Max.
– 495 mW Max.
Single 5V±10% Power Supply
1
) and active HIGH chip select two (CS
– 10/12/15/20/25 (Commercial)
– 15/20/25/35 (Military)
2
) as well as
PIN CONFIGURATIONS
CERPACK (F3) SIMILAR
SOIC (S4)
1
In addition to high performance and high density, the
device features latch-up protection, single event and
upset protection. The P4C422 is offered in several
packages: 22-pin 400 mil DIP (plastic and ceramic), 24-
pin 300 mil SOIC, 24-pin square LCC and 24-pin
CERPACK. Devices are offered in both commercial and
military temperature ranges.
Separate I/O
Fully TTL Compatible Inputs and Outputs
Resistant to single event upset and latchup
resulting from advanced process and design
improvements
Standard 22-pin 400 mil DIP, 24-pin 300 mil
SOIC, 24-pin square LCC package and 24-pin
CERPACK package
DIP (P3-1, C3-1, D3-1)
Document # SRAM101 REV. A
Revised October 2005
LCC (L4)

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P4C422-10CC Summary of contents

Page 1

... CERPACK package In addition to high performance and high density, the device features latch-up protection, single event and upset protection. The P4C422 is offered in several packages: 22-pin 400 mil DIP (plastic and ceramic), 24- pin 300 mil SOIC, 24-pin square LCC and 24-pin CERPACK. Devices are offered in both commercial and ) as well as military temperature ranges ...

Page 2

... W Parameter Value Temperature Under – +125 Bias Storage Temperature – +150 DC Output Current 20 (4) = 25° 1.0MHz) A Parameter Conditions Typ. Unit Input Capacitance Output Capacitance OUT P4C422 Min Max V 0.4 2.1 0.8 –1.5 –10 10 – -12 -15 -20 -25 - ...

Page 3

... LOW, chip 1 ) HIGH, write enable (WE) HIGH and 2 ). The outputs of the memory -25 -15 -20 -35 Min Max Min Max Min Max Min Max Page P4C422 Unit ...

Page 4

... P4C422 AC CHARACTERISTICS—WRITE CYCLE ( ± 10% except as noted, All Temperature Ranges) CC Parameter Sym. t Write Cycle Time ( Write Enable to High-Z (6) ZWS t Write Recovery Time WR t Write Pulse Width (5, Data Setup Time Prior to Write WSD t Data Hold Time (5) WHD t Address Setup Time ...

Page 5

... AC TEST LOADS & WAVEFORMS Figure 1a Figure 1c Document # SRAM101 REV. A P4C422 Figure 1b Figure 1d Page ...

Page 6

... P4C422 ORDERING INFORMATION SELECTION GUIDE The P4C422 is available in the following temperature range, speed, and package options. Temperature Package Range Plastic DIP Commercial Temperature SOIC Side Brazed DIP CERDIP Military Temperature LCC CERPACK Side Brazed DIP CERDIP Military Processed* LCC CERPACK *Military temperature range with MIL-STD-883, Class B compliance. ...

Page 7

... S1 0.005 - S2 0.005 - CERDIP DUAL IN-LINE PACKAGE D3-1 Pkg # # Pins 22 (400 Mil) Symbol Min Max A - 0.225 b 0.014 0.026 b2 0.045 0.065 C 0.008 0.018 D - 1.111 E 0.350 0.410 eA 0.400 BSC e 0.100 BSC L 0.125 0.200 Q 0.015 0.070 S1 0.005 - 0° 15° Document # SRAM101 REV. A P4C422 Page ...

Page 8

... P4C422 CERPACK CERAMIC FLAT PACKAGE F3 Pkg # # Pins 24 Symbol Min Max A 0.060 0.090 b 0.015 0.022 c 0.004 0.009 D - 0.630 E 0.330 0.380 e 0.050 BSC k 0.008 0.015 L 0.250 0.370 Q 0.026 0.045 S - 0.085 S1 0.005 - SQUARE LEADLESS CHIP CARRIER L4 Pkg # # Pins 24 Symbol Min Max A 0.060 0.075 A1 0.050 ...

Page 9

... SMALL OUTLINE IC PLASTIC PACKAGE S4 Pkg # # Pins 24 (300 Mil) Symbol Min Max A 0.093 0.104 A1 0.004 0.012 b2 0.013 0.020 C 0.009 0.012 D 0.598 0.614 e 0.050 BSC E 0.291 0.299 H 0.394 0.419 h 0.010 0.029 L 0.016 0.050 0° 8° Document # SRAM101 REV. A P4C422 Page ...

Page 10

... P4C422 REVISIONS DOCUMENT NUMBER: SRAM101 DOCUMENT TITLE: P4C422 ORIG. OF ISSUE REV. DATE CHANGE OR 1997 DAB A Oct-05 JDB Document # SRAM101 REV. A HIGH SPEED 256 x 4 Static CMOS RAM DESCRIPTION OF CHANGE New Data Sheet Change logo to Pyramid Page ...

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